northbridge: Drop print_ implementation from non-romcc boards

Because we had no stack on romcc boards, we had a separate, not as
powerful clone of printk: print_*. Back in the day, like more than
half a decade ago, we migrated a lot of boards to printk, but we never
cleaned up the existing code to be consistent. instead, we worked around
the problem with a very messy console.h (nowadays the mess is hidden in
romstage_console.c and early_print.h)
This patch cleans up the northbridge code to use printk() on all non-ROMCC
boards.

Change-Id: I4a36cd965c58aae65d74ce1e697dc0d0f58f47a1
Signed-off-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Reviewed-on: http://review.coreboot.org/7856
Reviewed-by: Edward O'Callaghan <eocallaghan@alterapraxis.com>
Tested-by: build bot (Jenkins)

5 files changed, 38 insertions, 62 deletions

diff --git a/src/northbridge/amd/amdk8/coherent_ht.c b/src/northbridge/amd/amdk8/coherent_ht.c
index 8abb31fad0..a8d87008f5 100644
--- a/src/northbridge/amd/amdk8/coherent_ht.c
+++ b/src/northbridge/amd/amdk8/coherent_ht.c
@@ -145,7 +145,7 @@ static void disable_probes(void)
 
 	u32 val;
 
-	print_spew("Disabling read/write/fill probes for UP... ");
+	printk(BIOS_SPEW, "Disabling read/write/fill probes for UP... ");
 
 	val=pci_read_config32(NODE_HT(0), HT_TRANSACTION_CONTROL);
 	val |= HTTC_DIS_FILL_P | HTTC_DIS_RMT_MEM_C | HTTC_DIS_P_MEM_C |
@@ -153,7 +153,7 @@ static void disable_probes(void)
 		HTTC_DIS_RD_DW_P | HTTC_DIS_RD_B_P;
 	pci_write_config32(NODE_HT(0), HT_TRANSACTION_CONTROL, val);
 
-	print_spew("done.\n");
+	printk(BIOS_SPEW, "done.\n");
 
 }
 
@@ -199,14 +199,13 @@ static void enable_routing(u8 node)
 	 */
 
 	/* Enable routing table */
-	print_spew("Enabling routing table for node ");
-	print_spew_hex8(node);
+	printk(BIOS_SPEW, "Enabling routing table for node %d", node);
 
 	val=pci_read_config32(NODE_HT(node), 0x6c);
 	val &= ~((1<<1)|(1<<0));
 	pci_write_config32(NODE_HT(node), 0x6c, val);
 
-	print_spew(" done.\n");
+	printk(BIOS_SPEW, " done.\n");
 }
 
 #if CONFIG_MAX_PHYSICAL_CPUS > 1
@@ -230,7 +229,7 @@ static u8 link_to_register(int ldt)
 	if (ldt&0x02) return 0x00;
 
 	/* we should never get here */
-	print_spew("Unknown Link\n");
+	printk(BIOS_SPEW, "Unknown Link\n");
 	return 0;
 }
 
@@ -248,15 +247,14 @@ static void rename_temp_node(u8 node)
 {
 	uint32_t val;
 
-	print_spew("Renaming current temporary node to ");
-	print_spew_hex8(node);
+	printk(BIOS_SPEW, "Renaming current temporary node to %d", node);
 
 	val=pci_read_config32(NODE_HT(7), 0x60);
 	val &= (~7);  /* clear low bits. */
 	val |= node;  /* new node        */
 	pci_write_config32(NODE_HT(7), 0x60, val);
 
-	print_spew(" done.\n");
+	printk(BIOS_SPEW, " done.\n");
 }
 
 static int verify_connection(u8 dest)
@@ -514,7 +512,7 @@ static void setup_remote_node(u8 node)
 	};
 	int i;
 
-	print_spew("setup_remote_node: ");
+	printk(BIOS_SPEW, "setup_remote_node: ");
 
 	/* copy the default resource map from node 0 */
 	for(i = 0; i < ARRAY_SIZE(pci_reg); i++) {
@@ -525,7 +523,7 @@ static void setup_remote_node(u8 node)
 		pci_write_config32(NODE_MP(7), reg, value);
 
 	}
-	print_spew("done\n");
+	printk(BIOS_SPEW, "done\n");
 }
 
 #endif /* CONFIG_MAX_PHYSICAL_CPUS > 1*/
@@ -664,7 +662,7 @@ static void setup_remote_row_indirect_group(const u8 *conn, int num)
 
 static void setup_uniprocessor(void)
 {
-	print_spew("Enabling UP settings\n");
+	printk(BIOS_SPEW, "Enabling UP settings\n");
 #if CONFIG_LOGICAL_CPUS
 	unsigned tmp = (pci_read_config32(NODE_MC(0), 0xe8) >> 12) & 3;
 	if (tmp>0) return;
@@ -1491,7 +1489,7 @@ static unsigned setup_smp(void)
 {
 	unsigned nodes;
 
-	print_spew("Enabling SMP settings\n");
+	printk(BIOS_SPEW, "Enabling SMP settings\n");
 
 	nodes = setup_smp2();
 #if CONFIG_MAX_PHYSICAL_CPUS > 2
@@ -1528,14 +1526,14 @@ static unsigned verify_mp_capabilities(unsigned nodes)
 #if CONFIG_MAX_PHYSICAL_CPUS > 2
 	case 0x02: /* MPCap    */
 		if(nodes > 2) {
-			print_err("Going back to DP\n");
+			printk(BIOS_ERR, "Going back to DP\n");
 			return 2;
 		}
 		break;
 #endif
 	case 0x00: /* Non SMP */
 		if(nodes >1 ) {
-			print_err("Going back to UP\n");
+			printk(BIOS_ERR, "Going back to UP\n");
 			return 1;
 		}
 		break;
@@ -1613,7 +1611,7 @@ static void coherent_ht_finalize(unsigned nodes)
 	 * registers on Hammer A0 revision.
 	 */
 
-	print_spew("coherent_ht_finalize\n");
+	printk(BIOS_SPEW, "coherent_ht_finalize\n");
 #if !CONFIG_K8_REV_F_SUPPORT
 	rev_a0 = is_cpu_rev_a0();
 #endif
@@ -1654,7 +1652,7 @@ static void coherent_ht_finalize(unsigned nodes)
 #endif
 	}
 
-	print_spew("done\n");
+	printk(BIOS_SPEW, "done\n");
 }
 
 static int apply_cpu_errata_fixes(unsigned nodes)
diff --git a/src/northbridge/amd/amdk8/debug.c b/src/northbridge/amd/amdk8/debug.c
index 4f9d8cafa9..c1021e5736 100644
--- a/src/northbridge/amd/amdk8/debug.c
+++ b/src/northbridge/amd/amdk8/debug.c
@@ -54,7 +54,7 @@ static void dump_pci_device(unsigned dev)
 		val = pci_read_config8(dev, i);
 		printk(BIOS_DEBUG, " %02x", val);
 	}
-	print_debug("\n");
+	printk(BIOS_DEBUG, "\n");
 }
 
 #if CONFIG_K8_REV_F_SUPPORT
@@ -63,7 +63,7 @@ static inline void dump_pci_device_index_wait(unsigned dev, uint32_t index_reg)
 {
 	int i;
 	print_debug_pci_dev(dev);
-	print_debug(" -- index_reg="); print_debug_hex32(index_reg);
+	printk(BIOS_DEBUG, " -- index_reg=%08x", index_reg);
 
 	for(i = 0; i < 0x40; i++) {
 		uint32_t val;
@@ -76,7 +76,7 @@ static inline void dump_pci_device_index_wait(unsigned dev, uint32_t index_reg)
 		}
 
 	}
-	print_debug("\n");
+	printk(BIOS_DEBUG, "\n");
 }
 #endif
 
@@ -135,7 +135,7 @@ static inline void dump_pci_devices_on_bus(unsigned busn)
 static void dump_spd_registers(const struct mem_controller *ctrl)
 {
 	int i;
-	print_debug("\n");
+	printk(BIOS_DEBUG, "\n");
 	for(i = 0; i < 4; i++) {
 		unsigned device;
 		device = ctrl->channel0[i];
@@ -155,7 +155,7 @@ static void dump_spd_registers(const struct mem_controller *ctrl)
 				byte = status & 0xff;
 				printk(BIOS_DEBUG, "%02x ", byte);
 			}
-			print_debug("\n");
+			printk(BIOS_DEBUG, "\n");
 		}
 		device = ctrl->channel1[i];
 		if (device) {
@@ -174,14 +174,14 @@ static void dump_spd_registers(const struct mem_controller *ctrl)
 				byte = status & 0xff;
 				printk(BIOS_DEBUG, "%02x ", byte);
 			}
-			print_debug("\n");
+			printk(BIOS_DEBUG, "\n");
 		}
 	}
 }
 static void dump_smbus_registers(void)
 {
 	unsigned device;
-	print_debug("\n");
+	printk(BIOS_DEBUG, "\n");
 	for(device = 1; device < 0x80; device++) {
 		int j;
 		if( smbus_read_byte(device, 0) < 0 ) continue;
@@ -199,7 +199,7 @@ static void dump_smbus_registers(void)
 			byte = status & 0xff;
 			printk(BIOS_DEBUG, "%02x ", byte);
 		}
-		print_debug("\n");
+		printk(BIOS_DEBUG, "\n");
 	}
 }
 #endif
@@ -218,7 +218,7 @@ static inline void dump_io_resources(unsigned port)
 		val = inb(port);
 		printk(BIOS_DEBUG, " %02x",val);
 		if ((i & 0x0f) == 0x0f) {
-			print_debug("\n");
+			printk(BIOS_DEBUG, "\n");
 		}
 		port++;
 	}
@@ -227,13 +227,13 @@ static inline void dump_io_resources(unsigned port)
 static inline void dump_mem(unsigned start, unsigned end)
 {
 	unsigned i;
-	print_debug("dump_mem:");
+	printk(BIOS_DEBUG, "dump_mem:");
 	for(i=start;i<end;i++) {
 		if((i & 0xf)==0) {
 			printk(BIOS_DEBUG, "\n%08x:", i);
 		}
 		printk(BIOS_DEBUG, " %02x", (unsigned char)*((unsigned char *)i));
 	}
-	print_debug("\n");
+	printk(BIOS_DEBUG, "\n");
  }
 #endif
diff --git a/src/northbridge/amd/amdk8/f.h b/src/northbridge/amd/amdk8/f.h
index bfeee0ecc5..4f958c54c2 100644
--- a/src/northbridge/amd/amdk8/f.h
+++ b/src/northbridge/amd/amdk8/f.h
@@ -564,11 +564,7 @@ static inline void wait_all_core0_mem_trained(struct sys_info *sysinfo)
 	}
 
 	for(i=0; i<sysinfo->nodes; i++) {
-#ifdef __PRE_RAM__
-		print_debug("mem_trained["); print_debug_hex8(i); print_debug("]="); print_debug_hex8(sysinfo->mem_trained[i]); print_debug("\n");
-#else
 		printk(BIOS_DEBUG, "mem_trained[%02x]=%02x\n", i, sysinfo->mem_trained[i]);
-#endif
 		switch(sysinfo->mem_trained[i]) {
 		case 0: //don't need train
 		case 1: //trained
@@ -581,11 +577,10 @@ static inline void wait_all_core0_mem_trained(struct sys_info *sysinfo)
 		}
 	}
 	if(needs_reset) {
+		printk(BIOS_DEBUG, "mem trained failed\n");
 #ifdef __PRE_RAM__
-		print_debug("mem trained failed\n");
 		soft_reset();
 #else
-		printk(BIOS_DEBUG, "mem trained failed\n");
 		hard_reset();
 #endif
 	}
diff --git a/src/northbridge/amd/amdk8/incoherent_ht.c b/src/northbridge/amd/amdk8/incoherent_ht.c
index cf8ad52fba..3c6cf33c9f 100644
--- a/src/northbridge/amd/amdk8/incoherent_ht.c
+++ b/src/northbridge/amd/amdk8/incoherent_ht.c
@@ -342,7 +342,7 @@ static int ht_setup_chainx(device_t udev, uint8_t upos, uint8_t bus, unsigned of
 				pci_write_config16(udev, upos + LINK_CTRL(uoffs), ctrl);
 				ctrl = pci_read_config16(udev, upos + LINK_CTRL(uoffs));
 				if (ctrl & ((1 << 4) | (1 << 8))) {
-					print_err("Detected error on Hypertransport Link\n");
+					printk(BIOS_ERR, "Detected error on Hypertransport Link\n");
 					break;
 				}
 			}
@@ -362,10 +362,10 @@ static int ht_setup_chainx(device_t udev, uint8_t upos, uint8_t bus, unsigned of
 
 		pos = ht_lookup_slave_capability(dev);
 		if (!pos) {
-			print_err("udev="); print_err_hex32(udev);
-			print_err("\tupos="); print_err_hex32(upos);
-			print_err("\tuoffs="); print_err_hex32(uoffs);
-			print_err("\tHT link capability not found\n");
+			printk(BIOS_ERR, "udev=%08x", udev);
+			printk(BIOS_ERR, "\tupos=%08x", upos);
+			printk(BIOS_ERR, "\tuoffs=%08x", uoffs);
+			printk(BIOS_ERR, "\tHT link capability not found\n");
 			break;
 		}
 
diff --git a/src/northbridge/amd/amdk8/raminit_test.c b/src/northbridge/amd/amdk8/raminit_test.c
index fd2107cce9..be46f27bca 100644
--- a/src/northbridge/amd/amdk8/raminit_test.c
+++ b/src/northbridge/amd/amdk8/raminit_test.c
@@ -57,11 +57,7 @@ static uint32_t pci_read_config32(device_t dev, unsigned where)
 		(pci_register[addr + 3]  << 24);
 
 #if 0
-	print_debug("pcir32(");
-	print_debug_hex32(addr);
-	print_debug("):");
-	print_debug_hex32(value);
-	print_debug("\n");
+	printk(BIOS_DEBUG, "pcir32(%08x): %08x\n", addr, value);
 #endif
 	return value;
 
@@ -92,11 +88,7 @@ static void pci_write_config32(device_t dev, unsigned where, uint32_t value)
 	pci_register[addr + 3] = (value >> 24) & 0xff;
 
 #if 0
-	print_debug("pciw32(");
-	print_debug_hex32(addr);
-	print_debug(", ");
-	print_debug_hex32(value);
-	print_debug(")\n");
+	printk(BIOS_DEBUG, "pciw32(%08x, %08x)\n", addr, value);
 #endif
 }
 
@@ -285,13 +277,8 @@ static int spd_read_byte(unsigned device, unsigned address)
 		}
 	}
 #if 0
-	print_debug("spd_read_byte(");
-	print_debug_hex32(device);
-	print_debug(", ");
-	print_debug_hex32(address);
-	print_debug(") -> ");
-	print_debug_hex32(result);
-	print_debug("\n");
+	printk(BIOS_DEBUG, "spd_read_byte(%08x, %08x) -> %08x\n",
+		device, address, result);
 #endif
 	if (spd_count >= spd_fail_count) {
 		result = -1;
@@ -392,9 +379,7 @@ static void test1(void)
 	raminit_main();
 
 #if 0
-	print_debug("spd_count: ");
-	print_debug_hex32(spd_count);
-	print_debug("\n");
+	printk(BIOS_DEBUG, "spd_count: %d\n", spd_count);
 #endif
 
 }
@@ -410,9 +395,7 @@ static void do_test2(int i)
 	reset_tests();
 	spd_fail_count = i;
 
-	print_debug("\nSPD will fail after: ");
-	print_debug_hex32(spd_fail_count);
-	print_debug(" accesses.\n");
+	printk(BIOS_DEBUG, "\nSPD will fail after: %d accesses.\n", %d);
 
 	memcpy(&spd_data[0*256], spd_micron_512MB_DDR333, 256);
 	memcpy(&spd_data[1*256], spd_micron_512MB_DDR333, 256);