diff options
author | Stefan Reinauer <reinauer@chromium.org> | 2015-01-05 12:59:54 -0800 |
---|---|---|
committer | Stefan Reinauer <stefan.reinauer@coreboot.org> | 2015-01-06 20:15:02 +0100 |
commit | 65b72ab55d7dff1f13cdf495d345e04e634b97ac (patch) | |
tree | 11771914bc4459d7cf9e020ff4489e9bb6a81e75 /src/northbridge/amd/amdmct/mct | |
parent | d42c9dae8528594b2ab8534d061c118c15e92d3d (diff) | |
download | coreboot-65b72ab55d7dff1f13cdf495d345e04e634b97ac.tar.xz |
northbridge: Drop print_ implementation from non-romcc boards
Because we had no stack on romcc boards, we had a separate, not as
powerful clone of printk: print_*. Back in the day, like more than
half a decade ago, we migrated a lot of boards to printk, but we never
cleaned up the existing code to be consistent. instead, we worked around
the problem with a very messy console.h (nowadays the mess is hidden in
romstage_console.c and early_print.h)
This patch cleans up the northbridge code to use printk() on all non-ROMCC
boards.
Change-Id: I4a36cd965c58aae65d74ce1e697dc0d0f58f47a1
Signed-off-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Reviewed-on: http://review.coreboot.org/7856
Reviewed-by: Edward O'Callaghan <eocallaghan@alterapraxis.com>
Tested-by: build bot (Jenkins)
Diffstat (limited to 'src/northbridge/amd/amdmct/mct')
-rw-r--r-- | src/northbridge/amd/amdmct/mct/mct_d.c | 2 | ||||
-rw-r--r-- | src/northbridge/amd/amdmct/mct/mctdqs_d.c | 14 | ||||
-rw-r--r-- | src/northbridge/amd/amdmct/mct/mctsrc.c | 20 | ||||
-rw-r--r-- | src/northbridge/amd/amdmct/mct/mcttmrl.c | 7 |
4 files changed, 16 insertions, 27 deletions
diff --git a/src/northbridge/amd/amdmct/mct/mct_d.c b/src/northbridge/amd/amdmct/mct/mct_d.c index 924c5fb645..7c7550d10b 100644 --- a/src/northbridge/amd/amdmct/mct/mct_d.c +++ b/src/northbridge/amd/amdmct/mct/mct_d.c @@ -262,7 +262,7 @@ restartinit: node_sys_base += (pDCTstat->NodeSysLimit + 2) & ~0x0F; } if (NodesWmem == 0) { - print_debug("No Nodes?!\n"); + printk(BIOS_DEBUG, "No Nodes?!\n"); goto fatalexit; } diff --git a/src/northbridge/amd/amdmct/mct/mctdqs_d.c b/src/northbridge/amd/amdmct/mct/mctdqs_d.c index 17fb289268..d7fd7383ca 100644 --- a/src/northbridge/amd/amdmct/mct/mctdqs_d.c +++ b/src/northbridge/amd/amdmct/mct/mctdqs_d.c @@ -357,22 +357,20 @@ static void TrainDQSRdWrPos_D(struct MCTStatStruc *pMCTstat, for (Dir = 0; Dir < 2; Dir++) { if (Dir == 0) { - print_debug("TrainDQSRdWrPos: CH_D_DIR_B_DQS WR:\n"); + printk(BIOS_DEBUG, "TrainDQSRdWrPos: CH_D_DIR_B_DQS WR:\n"); } else { - print_debug("TrainDQSRdWrPos: CH_D_DIR_B_DQS RD:\n"); + printk(BIOS_DEBUG, "TrainDQSRdWrPos: CH_D_DIR_B_DQS RD:\n"); } for (Channel = 0; Channel < 2; Channel++) { - print_debug("Channel:"); print_debug_hex8(Channel); print_debug("\n"); + printk(BIOS_DEBUG, "Channel: %02x\n", Channel); for (Receiver = cs_start; Receiver < (cs_start + 2); Receiver += 2) { - print_debug("\t\tReceiver:"); print_debug_hex8(Receiver); + printk(BIOS_DEBUG, "\t\tReceiver: %02x: ", Receiver); p = pDCTstat->CH_D_DIR_B_DQS[Channel][Receiver >> 1][Dir]; - print_debug(": "); for (i=0;i<8; i++) { val = p[i]; - print_debug_hex8(val); - print_debug(" "); + printk(BIOS_DEBUG, "%02x ", val); } - print_debug("\n"); + printk(BIOS_DEBUG, "\n"); } } } diff --git a/src/northbridge/amd/amdmct/mct/mctsrc.c b/src/northbridge/amd/amdmct/mct/mctsrc.c index feb41704d0..9c1324dd45 100644 --- a/src/northbridge/amd/amdmct/mct/mctsrc.c +++ b/src/northbridge/amd/amdmct/mct/mctsrc.c @@ -459,12 +459,9 @@ static void dqsTrainRcvrEn_SW(struct MCTStatStruc *pMCTstat, #if DQS_TRAIN_DEBUG > 0 { u8 Channel; - print_debug("TrainRcvrEn: CH_MaxRdLat:\n"); + printk(BIOS_DEBUG, "TrainRcvrEn: CH_MaxRdLat:\n"); for(Channel = 0; Channel<2; Channel++) { - print_debug("Channel:"); print_debug_hex8(Channel); - print_debug(": "); - print_debug_hex8( pDCTstat->CH_MaxRdLat[Channel] ); - print_debug("\n"); + printk(BIOS_DEBUG, "Channel: %02x: %02x\n", Channel, pDCTstat->CH_MaxRdLat[Channel]); } } #endif @@ -476,20 +473,17 @@ static void dqsTrainRcvrEn_SW(struct MCTStatStruc *pMCTstat, u8 i; u8 *p; - print_debug("TrainRcvrEn: CH_D_B_RCVRDLY:\n"); + printk(BIOS_DEBUG, "TrainRcvrEn: CH_D_B_RCVRDLY:\n"); for(Channel = 0; Channel < 2; Channel++) { - print_debug("Channel:"); print_debug_hex8(Channel); print_debug("\n"); + printk(BIOS_DEBUG, "Channel: %02x\n", Channel); for(Receiver = 0; Receiver<8; Receiver+=2) { - print_debug("\t\tReceiver:"); - print_debug_hex8(Receiver); + printk(BIOS_DEBUG, "\t\tReceiver: %02x: ", Receiver); p = pDCTstat->CH_D_B_RCVRDLY[Channel][Receiver>>1]; - print_debug(": "); for (i=0;i<8; i++) { val = p[i]; - print_debug_hex8(val); - print_debug(" "); + printk(BIOS_DEBUG, "%02x ", val); } - print_debug("\n"); + printk(BIOS_DEBUG, "\n"); } } } diff --git a/src/northbridge/amd/amdmct/mct/mcttmrl.c b/src/northbridge/amd/amdmct/mct/mcttmrl.c index 03ebf97c82..d31e7447a7 100644 --- a/src/northbridge/amd/amdmct/mct/mcttmrl.c +++ b/src/northbridge/amd/amdmct/mct/mcttmrl.c @@ -198,12 +198,9 @@ static void maxRdLatencyTrain_D(struct MCTStatStruc *pMCTstat, #if DQS_TRAIN_DEBUG > 0 { u8 Channel; - print_debug("maxRdLatencyTrain: CH_MaxRdLat:\n"); + printk(BIOS_DEBUG, "maxRdLatencyTrain: CH_MaxRdLat:\n"); for(Channel = 0; Channel<2; Channel++) { - print_debug("Channel:"); print_debug_hex8(Channel); - print_debug(": "); - print_debug_hex8( pDCTstat->CH_MaxRdLat[Channel] ); - print_debug("\n"); + printk(BIOS_DEBUG, "Channel: %02x: %02x\n", Channel, pDCTstat->CH_MaxRdLat[Channel]); } } #endif |