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author | Timothy Pearson <tpearson@raptorengineeringinc.com> | 2015-06-02 20:51:59 -0500 |
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committer | Stefan Reinauer <stefan.reinauer@coreboot.org> | 2015-11-10 19:31:46 +0100 |
commit | 453b54371681f8810ed50b41efbd7e09dc0f63d6 (patch) | |
tree | 3e15bcf17fad29e7d7ab84446b4ff78d85b72a55 /src/northbridge/amd/amdmct/mct_ddr3/mct_d.h | |
parent | 4c502697eef81238c71b1570e4ee9d9ee08455d5 (diff) | |
download | coreboot-453b54371681f8810ed50b41efbd7e09dc0f63d6.tar.xz |
northbridge/amd/amdmct: Read SPD data into cache to decrease bootup time
Change-Id: Ic16a927a3f1fc6f7cb1aea36a8abe8cc1999cb52
Signed-off-by: Timothy Pearson <tpearson@raptorengineeringinc.com>
Reviewed-on: http://review.coreboot.org/11973
Tested-by: build bot (Jenkins)
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Diffstat (limited to 'src/northbridge/amd/amdmct/mct_ddr3/mct_d.h')
-rw-r--r-- | src/northbridge/amd/amdmct/mct_ddr3/mct_d.h | 7 |
1 files changed, 7 insertions, 0 deletions
diff --git a/src/northbridge/amd/amdmct/mct_ddr3/mct_d.h b/src/northbridge/amd/amdmct/mct_ddr3/mct_d.h index 3aeb7eca2e..e6b427ed7b 100644 --- a/src/northbridge/amd/amdmct/mct_ddr3/mct_d.h +++ b/src/northbridge/amd/amdmct/mct_ddr3/mct_d.h @@ -318,6 +318,11 @@ struct MCTStatStruc { ===============================================================================*/ #include "mwlc_d.h" /* I have to */ +struct amd_spd_node_data { + uint8_t spd_bytes[MAX_DIMMS_SUPPORTED][256]; /* [DIMM][byte] */ + uint8_t spd_address[MAX_DIMMS_SUPPORTED]; /* [DIMM] */ +} __attribute__((packed)); + struct DCTStatStruc { /* A per Node structure*/ /* DCTStatStruct_F - start */ u8 Node_ID; /* Node ID of current controller */ @@ -611,6 +616,8 @@ struct DCTStatStruc { /* A per Node structure*/ char DimmPartNumber[MAX_DIMMS_SUPPORTED][SPD_PARTN_LENGTH+1]; uint16_t DimmRevisionNumber[MAX_DIMMS_SUPPORTED]; uint32_t DimmSerialNumber[MAX_DIMMS_SUPPORTED]; + + struct amd_spd_node_data spd_data; } __attribute__((packed)); struct amd_s3_persistent_mct_channel_data { |