diff options
author | Marc Jones <marcj303@gmail.com> | 2011-06-03 19:59:52 +0000 |
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committer | Marc Jones <marc.jones@amd.com> | 2011-06-03 19:59:52 +0000 |
commit | 471f103e530b97c1125acdab259043dd7f252fe9 (patch) | |
tree | f398b52a2d3ae8f9569a851151bfeb02bf4026a9 /src/northbridge/amd/amdmct/mct_ddr3/mct_d.h | |
parent | 23d3dfaa96649c71295de205885e97c6b45f9183 (diff) | |
download | coreboot-471f103e530b97c1125acdab259043dd7f252fe9.tar.xz |
This patch sets max freq defaults for ddr2 and ddr3for fam10.
Signed-off-by: Marc Jones <marcj303@gmail.com>
Acked-by: Scott Duplichan <scott@notabs.org>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6619 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Diffstat (limited to 'src/northbridge/amd/amdmct/mct_ddr3/mct_d.h')
-rw-r--r-- | src/northbridge/amd/amdmct/mct_ddr3/mct_d.h | 16 |
1 files changed, 0 insertions, 16 deletions
diff --git a/src/northbridge/amd/amdmct/mct_ddr3/mct_d.h b/src/northbridge/amd/amdmct/mct_ddr3/mct_d.h index a7b6697b75..69a495c27a 100644 --- a/src/northbridge/amd/amdmct/mct_ddr3/mct_d.h +++ b/src/northbridge/amd/amdmct/mct_ddr3/mct_d.h @@ -728,22 +728,6 @@ struct DCTStatStruc { /* A per Node structure*/ yy1b = enable with DctSelIntLvAddr set to yyb */ -#ifndef MAX_NODES_SUPPORTED -#define MAX_NODES_SUPPORTED 8 -#endif - -#ifndef MAX_DIMMS_SUPPORTED -#define MAX_DIMMS_SUPPORTED 8 -#endif - -#ifndef MAX_CS_SUPPORTED -#define MAX_CS_SUPPORTED 8 -#endif - -#ifndef MCT_DIMM_SPARE_NO_WARM -#define MCT_DIMM_SPARE_NO_WARM 0 -#endif - u32 Get_NB32(u32 dev, u32 reg); void Set_NB32(u32 dev, u32 reg, u32 val); u32 Get_NB32_index(u32 dev, u32 index_reg, u32 index); |