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author | Zheng Bao <zheng.bao@amd.com> | 2011-01-06 02:18:12 +0000 |
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committer | Zheng Bao <Zheng.Bao@amd.com> | 2011-01-06 02:18:12 +0000 |
commit | 69436e1a8ccf50d67004f74360f3ff5e6a146b9a (patch) | |
tree | a1765936b1304bcc16aaba9dafe7ead509cf50ec /src/northbridge/amd/amdmct/mct_ddr3/mctsrc.c | |
parent | da712f3f45bf27dc7326887c2d38cc7599f7448a (diff) | |
download | coreboot-69436e1a8ccf50d67004f74360f3ff5e6a146b9a.tar.xz |
Fix some settings fo AMD MCT. It is based on BIOS test suite.
Signed-off-by: Zheng Bao <zheng.bao@amd.com>
Acked-by: Stefan Reinauer <stepan@coreboot.org>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6246 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Diffstat (limited to 'src/northbridge/amd/amdmct/mct_ddr3/mctsrc.c')
-rw-r--r-- | src/northbridge/amd/amdmct/mct_ddr3/mctsrc.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/src/northbridge/amd/amdmct/mct_ddr3/mctsrc.c b/src/northbridge/amd/amdmct/mct_ddr3/mctsrc.c index 76ddb88d53..e0cda14b8a 100644 --- a/src/northbridge/amd/amdmct/mct_ddr3/mctsrc.c +++ b/src/northbridge/amd/amdmct/mct_ddr3/mctsrc.c @@ -1012,7 +1012,7 @@ static void fenceDynTraining_D(struct MCTStatStruc *pMCTstat, /* Write the (averaged value -8) to F2x[1,0]9C_x0C[PhyFence]. */ /* inlined mct_AdjustFenceValue() */ - /* The RBC0 is not supported. */ + /* TODO: The RBC0 is not supported. */ /* if (pDCTstat->LogicalCPUID & AMD_RB_C0) avRecValue -= 3; else |