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| author | Timothy Pearson <tpearson@raptorengineeringinc.com> | 2015-06-04 00:11:03 -0500 |
|---|---|---|
| committer | Ronald G. Minnich <rminnich@gmail.com> | 2015-11-11 06:14:20 +0100 |
| commit | df1fb9c05f822b5a84c802617d3bad7d049dcd76 (patch) | |
| tree | eb4fc73a5365d91f4702b15342d67581eed0a0e6 /src/northbridge/amd/amdmct/mct_ddr3/s3utils.h | |
| parent | 1b708656b2f347ab05bd89643322f86b7110a814 (diff) | |
| download | coreboot-df1fb9c05f822b5a84c802617d3bad7d049dcd76.tar.xz | |
amd/amdmct/mct_ddr3: Use training values from previous boot if possible
DRAM training accounts for most of the romstage startup time, yet
if the hardware configuration has not changed from the previous boot
the previously discovered training values are still valid. Use them
if the DIMM configuration has not changed since the last boot.
The SPD values of all installed DIMMs are hashed and stored in the S3
resume data area of the main system Flash device. If a DIMM is changed
the hash will almost certainly change as well, forcing retraining on next
boot.
Change-Id: I37ed277b16476d38e4af76c6ae827a575c6b017d
Signed-off-by: Timothy Pearson <tpearson@raptorengineeringinc.com>
Reviewed-on: http://review.coreboot.org/11976
Tested-by: Raptor Engineering Automated Test Stand <noreply@raptorengineeringinc.com>
Tested-by: build bot (Jenkins)
Reviewed-by: Ronald G. Minnich <rminnich@gmail.com>
Diffstat (limited to 'src/northbridge/amd/amdmct/mct_ddr3/s3utils.h')
| -rw-r--r-- | src/northbridge/amd/amdmct/mct_ddr3/s3utils.h | 10 |
1 files changed, 8 insertions, 2 deletions
diff --git a/src/northbridge/amd/amdmct/mct_ddr3/s3utils.h b/src/northbridge/amd/amdmct/mct_ddr3/s3utils.h index 5370496615..56e627e413 100644 --- a/src/northbridge/amd/amdmct/mct_ddr3/s3utils.h +++ b/src/northbridge/amd/amdmct/mct_ddr3/s3utils.h @@ -16,9 +16,15 @@ #include "../wrappers/mcti.h" #include "mct_d.h" +void calculate_spd_hash(uint8_t *spd_data, uint64_t *spd_hash); + +#ifdef __PRE_RAM__ +int8_t load_spd_hashes_from_nvram(struct DCTStatStruc *pDCTstat); +#endif + #ifdef __RAMSTAGE__ int8_t save_mct_information_to_nvram(void); #endif -int8_t restore_mct_information_from_nvram(void); +int8_t restore_mct_information_from_nvram(uint8_t training_only); void copy_mct_data_to_save_variable(struct amd_s3_persistent_data* persistent_data); -void restore_mct_data_from_save_variable(struct amd_s3_persistent_data* persistent_data);
\ No newline at end of file +void restore_mct_data_from_save_variable(struct amd_s3_persistent_data* persistent_data, uint8_t training_only); |