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author | Timothy Pearson <tpearson@raptorengineeringinc.com> | 2015-06-10 10:46:17 -0500 |
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committer | Stefan Reinauer <stefan.reinauer@coreboot.org> | 2015-11-12 00:51:23 +0100 |
commit | f70946ff4d70d763ce75bf3876bc94dc708275b1 (patch) | |
tree | b75f957e19a6cc75a8f86c5a480d8f3348baeaad /src/northbridge/amd/amdmct/mct_ddr3/s3utils.h | |
parent | ab87c4db30acda329d010ac9e91d0bb8b9c6c1cc (diff) | |
download | coreboot-f70946ff4d70d763ce75bf3876bc94dc708275b1.tar.xz |
northbridge/amd/amdmct: Verify MCT NVRAM options before skipping training
Change-Id: If26e5d148a906d63bd1407b8ffa58f08ae6b4275
Signed-off-by: Timothy Pearson <tpearson@raptorengineeringinc.com>
Reviewed-on: http://review.coreboot.org/11986
Tested-by: build bot (Jenkins)
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Diffstat (limited to 'src/northbridge/amd/amdmct/mct_ddr3/s3utils.h')
-rw-r--r-- | src/northbridge/amd/amdmct/mct_ddr3/s3utils.h | 3 |
1 files changed, 2 insertions, 1 deletions
diff --git a/src/northbridge/amd/amdmct/mct_ddr3/s3utils.h b/src/northbridge/amd/amdmct/mct_ddr3/s3utils.h index 56e627e413..8a726952dd 100644 --- a/src/northbridge/amd/amdmct/mct_ddr3/s3utils.h +++ b/src/northbridge/amd/amdmct/mct_ddr3/s3utils.h @@ -17,9 +17,10 @@ #include "mct_d.h" void calculate_spd_hash(uint8_t *spd_data, uint64_t *spd_hash); +uint16_t calculate_nvram_mct_hash(void); #ifdef __PRE_RAM__ -int8_t load_spd_hashes_from_nvram(struct DCTStatStruc *pDCTstat); +int8_t load_spd_hashes_from_nvram(struct MCTStatStruc *pMCTstat, struct DCTStatStruc *pDCTstat); #endif #ifdef __RAMSTAGE__ |