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| author | Timothy Pearson <tpearson@raptorengineeringinc.com> | 2016-04-21 01:34:03 -0500 |
|---|---|---|
| committer | Martin Roth <martinroth@google.com> | 2016-04-22 17:31:42 +0200 |
| commit | 5a359365b9ba0e4868f3d15f25d60c6cb321cada (patch) | |
| tree | 17df8348199cf1574c8a8a1ba450189b3bf28df7 /src/northbridge/amd/amdmct | |
| parent | 490160140af90f8d07ba897fed161c4c2599303b (diff) | |
| download | coreboot-5a359365b9ba0e4868f3d15f25d60c6cb321cada.tar.xz | |
nb/amd/mct_ddr3: Enhance debugging around MEMCLK frequency change
Change-Id: I5056cf885b7063a97c095bfaaf01dd8da777a425
Signed-off-by: Timothy Pearson <tpearson@raptorengineeringinc.com>
Reviewed-on: https://review.coreboot.org/14447
Tested-by: build bot (Jenkins)
Tested-by: Raptor Engineering Automated Test Stand <noreply@raptorengineeringinc.com>
Reviewed-by: Martin Roth <martinroth@google.com>
Diffstat (limited to 'src/northbridge/amd/amdmct')
| -rw-r--r-- | src/northbridge/amd/amdmct/mct_ddr3/mctwl.c | 8 |
1 files changed, 7 insertions, 1 deletions
diff --git a/src/northbridge/amd/amdmct/mct_ddr3/mctwl.c b/src/northbridge/amd/amdmct/mct_ddr3/mctwl.c index b354d923f8..44ea6e8f84 100644 --- a/src/northbridge/amd/amdmct/mct_ddr3/mctwl.c +++ b/src/northbridge/amd/amdmct/mct_ddr3/mctwl.c @@ -2,7 +2,7 @@ * This file is part of the coreboot project. * * Copyright (C) 2010 Advanced Micro Devices, Inc. - * Copyright (C) 2015 Timothy Pearson <tpearson@raptorengineeringinc.com>, Raptor Engineering + * Copyright (C) 2015 - 2016 Raptor Engineering, LLC * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by @@ -358,9 +358,13 @@ void SetTargetFreq(struct MCTStatStruc *pMCTstat, uint32_t dword; uint8_t package_type = mctGet_NVbits(NV_PACK_TYPE); + printk(BIOS_DEBUG, "%s: Start\n", __func__); + struct DCTStatStruc *pDCTstat; pDCTstat = pDCTstatA + Node; + printk(BIOS_DEBUG, "%s: Node %d: New frequency code: %04x\n", __func__, Node, pDCTstat->TargetFreq); + if (is_fam15h()) { /* Program F2x[1, 0]90[DisDllShutDownSR]=1. */ if (pDCTstat->DIMMValidDCT[0]) { @@ -448,6 +452,8 @@ void SetTargetFreq(struct MCTStatStruc *pMCTstat, FreqChgCtrlWrd(pMCTstat, pDCTstat, 1); } } + + printk(BIOS_DEBUG, "%s: Done\n", __func__); } static void Modify_OnDimmMirror(struct DCTStatStruc *pDCTstat, u8 dct, u8 set) |