summaryrefslogtreecommitdiff
path: root/src/northbridge/amd/cimx/rd890/NbPlatform.h
diff options
context:
space:
mode:
authorKerry Sheh <shekairui@gmail.com>2012-02-07 20:31:40 +0800
committerMarc Jones <marcj303@gmail.com>2012-02-16 19:35:09 +0100
commit6b909f21af1c012a0de6bc817311c8b93683ee39 (patch)
tree622f915e2046fb3d2e9b8bb290133891fe0892f7 /src/northbridge/amd/cimx/rd890/NbPlatform.h
parente41745e5d6106e8d95d36848ee9522bfaa756831 (diff)
downloadcoreboot-6b909f21af1c012a0de6bc817311c8b93683ee39.tar.xz
RD890: AMD RD890/SR56X0 CIMX wrapper
Support AMD RD890 CIMX support AMD RD890TV, RX780, RD780, SR56x0, RD890 and 990FX chipsets. Change-Id: I39dc5fc316fbb465808bac48a13a49b7d867f04f Signed-off-by: Kerry Sheh <kerry.she@amd.com> Signed-off-by: Kerry Sheh <shekairui@gmail.com> Reviewed-on: http://review.coreboot.org/559 Tested-by: build bot (Jenkins) Reviewed-by: Marc Jones <marcj303@gmail.com>
Diffstat (limited to 'src/northbridge/amd/cimx/rd890/NbPlatform.h')
-rw-r--r--src/northbridge/amd/cimx/rd890/NbPlatform.h147
1 files changed, 147 insertions, 0 deletions
diff --git a/src/northbridge/amd/cimx/rd890/NbPlatform.h b/src/northbridge/amd/cimx/rd890/NbPlatform.h
new file mode 100644
index 0000000000..824057ad05
--- /dev/null
+++ b/src/northbridge/amd/cimx/rd890/NbPlatform.h
@@ -0,0 +1,147 @@
+/*
+ * This file is part of the coreboot project.
+ *
+ * Copyright (C) 2012 Advanced Micro Devices, Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; version 2 of the License.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
+ */
+
+#ifndef _NB_PLATFORM_H_
+#define _NB_PLATFORM_H_
+
+#define SERIAL_OUT_SUPPORT //enable serial output
+#define CIMX_DEBUG
+
+#ifdef CIMX_DEBUG
+#define CIMX_TRACE_SUPPORT
+#define CIMX_ASSERT_SUPPORT
+#endif
+
+#ifdef CIMX_TRACE_SUPPORT
+ #define CIMX_INIT_TRACE(Arguments)
+ #if CONFIG_REDIRECT_NBCIMX_TRACE_TO_SERIAL
+ #define TRACE_DATA(Ptr, Level) BIOS_DEBUG //always enable
+ #define CIMX_TRACE(Argument) do {do_printk Argument;} while (0)
+ #else
+ #define TRACE_DATA(Ptr, Level)
+ #define CIMX_TRACE(Argument)
+ #endif
+#else
+ #define CIMX_TRACE(Argument)
+ #define CIMX_INIT_TRACE(Arguments)
+#endif
+
+#ifdef CIMX_ASSERT_SUPPORT
+ #ifdef ASSERT
+ #undef ASSERT
+ #define ASSERT CIMX_ASSERT
+ #endif
+ #ifdef CIMX_TRACE_SUPPORT
+ #define CIMX_ASSERT(x) if(!(x)) {\
+ LibAmdTraceDebug (CIMX_TRACE_ALL, (CHAR8 *)"ASSERT !!! "__FILE__" - line %d\n", __LINE__); \
+ /*__asm {jmp $}; */\
+ }
+ //#define IDS_HDT_CONSOLE(s, args...) do_printk(BIOS_DEBUG, s, ##args)
+ #else
+ #define CIMX_ASSERT(x) if(!(x)) {\
+ /*__asm {jmp $}; */\
+ }
+ #endif
+#else
+ #define CIMX_ASSERT(x)
+#endif
+
+/*----------------------------------------------------------------------------------------
+ * E X P O R T E D F U N C T I O N S
+ *----------------------------------------------------------------------------------------
+ */
+
+//#define STALL(Ptr, TimeUs, Flag) LibAmdSbStall(TimeUs)
+#define STALL(Ptr, TimeUs, Flag) LibAmdSbStall(TimeUs, Ptr)
+
+#ifdef B2_IMAGE
+#define REPORT_EVENT(Class, Info, Param1, Param2, Param3, Param4, CfgPtr) LibNbEventLog(Class, Info, Param1, Param2, Param3, Param4, CfgPtr)
+#else
+#define REPORT_EVENT(Class, Info, Param1, Param2, Param3, Param4, CfgPtr)
+#endif
+
+
+
+// CIMX configuration parameters
+//#define CIMX_B2_IMAGE_BASE_ADDRESS 0xFFF40000
+/**
+ * PCIEX_BASE_ADDRESS - Define PCIE base address
+ *
+ * @param[Option] MOVE_PCIEBAR_TO_F0000000 Set PCIe base address to 0xF7000000
+ */
+#ifdef MOVE_PCIEBAR_TO_F0000000
+#define PCIEX_BASE_ADDRESS 0xF7000000
+#else
+#define PCIEX_BASE_ADDRESS CONFIG_MMCONF_BASE_ADDRESS
+#endif
+
+
+
+#define CIMX_S3_SAVE 1
+#include "cbtypes.h"
+#include <console/console.h>
+
+#include "amd.h" //cimx typedef
+#include <amdlib.h>
+#include "amdAcpiLib.h"
+#include "amdAcpiMadt.h"
+#include "amdAcpiIvrs.h"
+#include "amdSbLib.h"
+#include "nbPcie.h"
+
+//must put before the nbType.h
+#include "platform_cfg.h" /*platform dependented configuration */
+#include "nbType.h"
+
+#include "nbLib.h"
+#include "nbDef.h"
+#include "nbInit.h"
+#include "nbHtInit.h"
+#include "nbIommu.h"
+#include "nbEventLog.h"
+#include "nbRegisters.h"
+#include "nbPcieAspm.h"
+#include "nbPcieLinkWidth.h"
+#include "nbPcieHotplug.h"
+#include "nbPciePortRemap.h"
+#include "nbPcieWorkarounds.h"
+#include "nbPcieCplBuffers.h"
+#include "nbPciePllControl.h"
+#include "nbMiscInit.h"
+#include "nbIoApic.h"
+#include "nbPcieSb.h"
+#include "nbRecovery.h"
+#include "nbMaskedMemoryInit.h"
+
+
+#define FIX_PTR_ADDR(x, y) x
+
+#define TRACE_ALWAYS 0xffffffff
+
+#define AmdNbDispatcher NULL
+
+#define CIMX_TRACE_ALL 0xFFFFFFFF
+#define CIMX_NBPOR_TRACE 0xFFFFFFFF
+#define CIMX_NBHT_TRACE 0xFFFFFFFF
+#define CIMX_NBPCIE_TRACE 0xFFFFFFFF
+#define CIMX_NB_TRACE 0xFFFFFFFF
+#define CIMX_NBPCIE_MISC 0xFFFFFFFF
+
+#endif
+