diff options
| author | Kerry Sheh <shekairui@gmail.com> | 2012-02-07 20:31:40 +0800 |
|---|---|---|
| committer | Marc Jones <marcj303@gmail.com> | 2012-02-16 19:35:09 +0100 |
| commit | 6b909f21af1c012a0de6bc817311c8b93683ee39 (patch) | |
| tree | 622f915e2046fb3d2e9b8bb290133891fe0892f7 /src/northbridge/amd/cimx/rd890/nb_cimx.h | |
| parent | e41745e5d6106e8d95d36848ee9522bfaa756831 (diff) | |
| download | coreboot-6b909f21af1c012a0de6bc817311c8b93683ee39.tar.xz | |
RD890: AMD RD890/SR56X0 CIMX wrapper
Support AMD RD890 CIMX support AMD RD890TV, RX780, RD780, SR56x0,
RD890 and 990FX chipsets.
Change-Id: I39dc5fc316fbb465808bac48a13a49b7d867f04f
Signed-off-by: Kerry Sheh <kerry.she@amd.com>
Signed-off-by: Kerry Sheh <shekairui@gmail.com>
Reviewed-on: http://review.coreboot.org/559
Tested-by: build bot (Jenkins)
Reviewed-by: Marc Jones <marcj303@gmail.com>
Diffstat (limited to 'src/northbridge/amd/cimx/rd890/nb_cimx.h')
| -rw-r--r-- | src/northbridge/amd/cimx/rd890/nb_cimx.h | 44 |
1 files changed, 44 insertions, 0 deletions
diff --git a/src/northbridge/amd/cimx/rd890/nb_cimx.h b/src/northbridge/amd/cimx/rd890/nb_cimx.h new file mode 100644 index 0000000000..a6f77db1a8 --- /dev/null +++ b/src/northbridge/amd/cimx/rd890/nb_cimx.h @@ -0,0 +1,44 @@ +/* + * This file is part of the coreboot project. + * + * Copyright (C) 2012 Advanced Micro Devices, Inc. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; version 2 of the License. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA + */ + +#ifndef _NB_CIMX_H_ +#define _NB_CIMX_H_ + +/** + * @brief disable GPP1 Port0,1, GPP2, GPP3a Port0,1,2,3,4,5, GPP3b + * + * SR5650/5670/5690 RD890 chipset, read pci config space hang at POR, + * Disable all Pcie Bridges to work around It. + */ +void sr56x0_rd890_disable_pcie_bridge(void); + +/** + * Northbridge CIMX entries point + */ +void nb_Poweron_Init(void); +void nb_Ht_Init(void); +void nb_S3_Init(void); +void nb_Early_Post_Init(void); +void nb_Mid_Post_Init(void); +void nb_Late_Post_Init(void); +void nb_Pcie_Early_Init(void); +void nb_Pcie_Late_Init(void); + +#endif//_RD890_EARLY_H_ + |