diff options
author | Stefan Reinauer <stepan@coresystems.de> | 2010-04-02 22:11:20 +0000 |
---|---|---|
committer | Stefan Reinauer <stepan@openbios.org> | 2010-04-02 22:11:20 +0000 |
commit | 720297c3d46122af14c69545f4ab22337f540ae3 (patch) | |
tree | da2ca126f53813ae0c39931b2e9ffc421a92e754 /src/northbridge/amd/lx | |
parent | b54deb77f03269419a257d3c5b0f06d38831f125 (diff) | |
download | coreboot-720297c3d46122af14c69545f4ab22337f540ae3.tar.xz |
remove some more warnings
Signed-off-by: Stefan Reinauer <stepan@coresystems.de>
Acked-by: Stefan Reinauer <stepan@coresystems.de>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5348 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Diffstat (limited to 'src/northbridge/amd/lx')
-rw-r--r-- | src/northbridge/amd/lx/pll_reset.c | 6 | ||||
-rw-r--r-- | src/northbridge/amd/lx/raminit.c | 7 |
2 files changed, 12 insertions, 1 deletions
diff --git a/src/northbridge/amd/lx/pll_reset.c b/src/northbridge/amd/lx/pll_reset.c index 188a96e85c..576a2239ed 100644 --- a/src/northbridge/amd/lx/pll_reset.c +++ b/src/northbridge/amd/lx/pll_reset.c @@ -72,6 +72,7 @@ static void pll_reset(char manualconf) return; } +#if 0 // Unused static unsigned int CPUSpeed(void) { unsigned int speed; @@ -84,6 +85,8 @@ static unsigned int CPUSpeed(void) } return (speed); } +#endif + static unsigned int GeodeLinkSpeed(void) { unsigned int speed; @@ -96,6 +99,8 @@ static unsigned int GeodeLinkSpeed(void) } return (speed); } + +#if 0 // Unused static unsigned int PCISpeed(void) { msr_t msr; @@ -107,3 +112,4 @@ static unsigned int PCISpeed(void) return (33); } } +#endif diff --git a/src/northbridge/amd/lx/raminit.c b/src/northbridge/amd/lx/raminit.c index 10717add08..68fd0bfdbe 100644 --- a/src/northbridge/amd/lx/raminit.c +++ b/src/northbridge/amd/lx/raminit.c @@ -514,6 +514,8 @@ static void set_extended_mode_registers(void) wrmsr(MC_CF07_DATA, msr); } +#undef TLA_MEMORY_DEBUG +#ifdef TLA_MEMORY_DEBUG static void EnableMTest(void) { msr_t msr; @@ -534,6 +536,7 @@ static void EnableMTest(void) print_info("Enabled MTest for TLA debug\n"); } +#endif static void sdram_set_registers(const struct mem_controller *ctrl) { @@ -642,8 +645,10 @@ static void sdram_enable(int controllers, const struct mem_controller *ctrl) ;********************************************************************/ post_code(POST_MEM_ENABLE); // post_76h +#ifdef TLA_MEMORY_DEBUG /* Only enable MTest for TLA memory debug */ - /*EnableMTest(); */ + EnableMTest(); +#endif /* If both Page Size = "Not Installed" we have a problems and should halt. */ msr = rdmsr(MC_CF07_DATA); |