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authorKyösti Mälkki <kyosti.malkki@gmail.com>2016-06-14 14:49:07 -0500
committerPatrick Georgi <pgeorgi@google.com>2018-09-15 11:35:38 +0000
commit03eb8a8515b241887b98f80d034e0cdfe13e203b (patch)
treedd88126890a6251561f5ddd0ff8d4c4a29f6de81 /src/northbridge/amd/pi/00730F01
parent33fa95cd35da93c3e41ca50fb9bc6bc4c2b2cf12 (diff)
downloadcoreboot-03eb8a8515b241887b98f80d034e0cdfe13e203b.tar.xz
nb/amd/pi/00730F01: Initialize IOMMU device
Change-Id: I12d3ed35770ee06626f884db23004652084c88c0 Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com> Reviewed-on: https://review.coreboot.org/15186 Reviewed-by: Patrick Georgi <pgeorgi@google.com> Reviewed-by: Alexander Couzens <lynxis@fe80.eu> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/northbridge/amd/pi/00730F01')
-rw-r--r--src/northbridge/amd/pi/00730F01/Makefile.inc1
-rw-r--r--src/northbridge/amd/pi/00730F01/iommu.c60
2 files changed, 61 insertions, 0 deletions
diff --git a/src/northbridge/amd/pi/00730F01/Makefile.inc b/src/northbridge/amd/pi/00730F01/Makefile.inc
index 3cf4ed1355..39c3ee61ba 100644
--- a/src/northbridge/amd/pi/00730F01/Makefile.inc
+++ b/src/northbridge/amd/pi/00730F01/Makefile.inc
@@ -16,3 +16,4 @@
romstage-y += dimmSpd.c
ramstage-y += northbridge.c
+ramstage-y += iommu.c
diff --git a/src/northbridge/amd/pi/00730F01/iommu.c b/src/northbridge/amd/pi/00730F01/iommu.c
new file mode 100644
index 0000000000..1ff4cfbbc9
--- /dev/null
+++ b/src/northbridge/amd/pi/00730F01/iommu.c
@@ -0,0 +1,60 @@
+/*
+ * This file is part of the coreboot project.
+ *
+ * Copyright (C) 2013 Rudolf Marek <r.marek@assembler.cz>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; version 2 of the License.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ */
+
+#include <device/device.h>
+#include <device/pci.h>
+#include <device/pci_ids.h>
+#include <device/pci_ops.h>
+#include <lib.h>
+
+static void iommu_read_resources(struct device *dev)
+{
+ struct resource *res;
+
+ /* Get the normal pci resources of this device */
+ pci_dev_read_resources(dev);
+
+ /* Add an extra subtractive resource for both memory and I/O. */
+ res = new_resource(dev, 0x44);
+ res->size = 512 * 1024;
+ res->align = log2(res->size);
+ res->gran = log2(res->size);
+ res->limit = 0xffffffff; /* 4G */
+ res->flags = IORESOURCE_MEM;
+}
+
+static void iommu_set_resources(struct device *dev)
+{
+ pci_dev_set_resources(dev);
+}
+
+static struct pci_operations lops_pci = {
+ .set_subsystem = pci_dev_set_subsystem,
+};
+
+static struct device_operations iommu_ops = {
+ .read_resources = iommu_read_resources,
+ .set_resources = iommu_set_resources,
+ .enable_resources = pci_dev_enable_resources,
+ .init = 0,
+ .scan_bus = 0,
+ .ops_pci = &lops_pci,
+};
+
+static const struct pci_driver iommu_driver __pci_driver = {
+ .ops = &iommu_ops,
+ .vendor = PCI_VENDOR_ID_AMD,
+ .device = PCI_DEVICE_ID_AMD_16H_MODEL_303F_NB_IOMMU,
+};