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| author | Kyösti Mälkki <kyosti.malkki@gmail.com> | 2017-04-15 20:07:53 +0300 |
|---|---|---|
| committer | Kyösti Mälkki <kyosti.malkki@gmail.com> | 2017-05-18 06:50:53 +0200 |
| commit | e87564ffe7d0636699467b776a24adffb2f11cca (patch) | |
| tree | b4c4aa66031cfd20f29714d044c67217a439aba2 /src/northbridge/amd/pi/agesawrapper.c | |
| parent | 61be3603f4b9f353e605d7b7c8d0d9f3b90f5636 (diff) | |
| download | coreboot-e87564ffe7d0636699467b776a24adffb2f11cca.tar.xz | |
binaryPI: Fix UMA calculations
Vendorcode decides already in AMD_INIT_POST the exact location
of UMA memory. To meet alignment requirements, it will extend
uma_memory_size. We cannot calculate base from size and TOP_MEM1,
but need to calculate size from base and TOP_MEM1 instead.
Also allows selection of UmaMode==UMA_SPECIFIED to manually set
amount of memory reserved for framebuffer.
Change-Id: I0c375e5da0dfef6cef0c50272356cd32a87b1ff6
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: https://review.coreboot.org/19346
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Marshall Dawson <marshalldawson3rd@gmail.com>
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Diffstat (limited to 'src/northbridge/amd/pi/agesawrapper.c')
| -rw-r--r-- | src/northbridge/amd/pi/agesawrapper.c | 16 |
1 files changed, 13 insertions, 3 deletions
diff --git a/src/northbridge/amd/pi/agesawrapper.c b/src/northbridge/amd/pi/agesawrapper.c index 0afd0ca78a..ec1d0acf9f 100644 --- a/src/northbridge/amd/pi/agesawrapper.c +++ b/src/northbridge/amd/pi/agesawrapper.c @@ -15,6 +15,7 @@ #include <AGESA.h> #include <cbfs.h> +#include <cbmem.h> #include <delay.h> #include <cpu/x86/mtrr.h> #include <cpuRegisters.h> @@ -137,15 +138,25 @@ AGESA_STATUS agesawrapper_amdinitpost(void) AmdCreateStruct (&AmdParamStruct); PostParams = (AMD_POST_PARAMS *)AmdParamStruct.NewStructPtr; - OemPostParams(PostParams); - // Do not use IS_ENABLED here. CONFIG_GFXUMA should always have a value. Allow // the compiler to flag the error if CONFIG_GFXUMA is not set. PostParams->MemConfig.UmaMode = CONFIG_GFXUMA ? UMA_AUTO : UMA_NONE; PostParams->MemConfig.UmaSize = 0; PostParams->MemConfig.BottomIo = (UINT16) (CONFIG_BOTTOMIO_POSITION >> 24); + + OemPostParams(PostParams); + status = AmdInitPost (PostParams); + + /* If UMA is enabled we currently have it below TOP_MEM as well. + * UMA may or may not be cacheable, so Sub4GCacheTop could be + * higher than UmaBase. With UMA_NONE we see UmaBase==0. */ + if (PostParams->MemConfig.UmaBase) + backup_top_of_ram(PostParams->MemConfig.UmaBase << 16); + else + backup_top_of_ram(PostParams->MemConfig.Sub4GCacheTop); + printk( BIOS_SPEW, "setup_uma_memory: umamode %s\n", @@ -166,7 +177,6 @@ AGESA_STATUS agesawrapper_amdinitpost(void) (unsigned long)(PostParams->MemConfig.UmaSize) >> (20 - 16), (unsigned long)(PostParams->MemConfig.UmaBase) << 16 ); - if (status != AGESA_SUCCESS) agesawrapper_amdreadeventlog(PostParams->StdHeader.HeapStatus); AmdReleaseStruct (&AmdParamStruct); /* Initialize heap space */ |