diff options
| author | Furquan Shaikh <furquan@google.com> | 2020-05-02 10:24:23 -0700 |
|---|---|---|
| committer | Furquan Shaikh <furquan@google.com> | 2020-05-02 18:45:16 +0000 |
| commit | 76cedd2c292352d7dbd45fab70ec272e476d0910 (patch) | |
| tree | 21fa0e33a2324e2ab93f38a90f6efd1a49ecdd76 /src/northbridge/amd/pi | |
| parent | e0844636aca974449c7257e846ec816db683d0b9 (diff) | |
| download | coreboot-76cedd2c292352d7dbd45fab70ec272e476d0910.tar.xz | |
acpi: Move ACPI table support out of arch/x86 (3/5)
This change moves all ACPI table support in coreboot currently living
under arch/x86 into common code to make it architecture
independent. ACPI table generation is not really tied to any
architecture and hence it makes sense to move this to its own
directory.
In order to make it easier to review, this change is being split into
multiple CLs. This is change 3/5 which basically is generated by
running the following command:
$ git grep -iIl "arch/acpi" | xargs sed -i 's/arch\/acpi/acpi\/acpi/g'
BUG=b:155428745
Change-Id: I16b1c45d954d6440fb9db1d3710063a47b582eae
Signed-off-by: Furquan Shaikh <furquan@google.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/40938
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: HAOUAS Elyes <ehaouas@noos.fr>
Diffstat (limited to 'src/northbridge/amd/pi')
| -rw-r--r-- | src/northbridge/amd/pi/00630F01/northbridge.c | 4 | ||||
| -rw-r--r-- | src/northbridge/amd/pi/00660F01/northbridge.c | 4 | ||||
| -rw-r--r-- | src/northbridge/amd/pi/00730F01/northbridge.c | 6 |
3 files changed, 7 insertions, 7 deletions
diff --git a/src/northbridge/amd/pi/00630F01/northbridge.c b/src/northbridge/amd/pi/00630F01/northbridge.c index 1ead42c92e..5d832eaf4b 100644 --- a/src/northbridge/amd/pi/00630F01/northbridge.c +++ b/src/northbridge/amd/pi/00630F01/northbridge.c @@ -3,7 +3,7 @@ #include <console/console.h> #include <device/pci_ops.h> -#include <arch/acpi.h> +#include <acpi/acpi.h> #include <stdint.h> #include <device/device.h> #include <device/pci.h> @@ -18,7 +18,7 @@ #include <cpu/x86/lapic.h> #include <cpu/amd/msr.h> #include <cpu/amd/mtrr.h> -#include <arch/acpigen.h> +#include <acpi/acpigen.h> #include <northbridge/amd/pi/nb_common.h> #include <northbridge/amd/agesa/agesa_helper.h> diff --git a/src/northbridge/amd/pi/00660F01/northbridge.c b/src/northbridge/amd/pi/00660F01/northbridge.c index e3d753a93d..8bb64b761a 100644 --- a/src/northbridge/amd/pi/00660F01/northbridge.c +++ b/src/northbridge/amd/pi/00660F01/northbridge.c @@ -3,7 +3,7 @@ #include <console/console.h> #include <device/pci_ops.h> -#include <arch/acpi.h> +#include <acpi/acpi.h> #include <stdint.h> #include <device/device.h> #include <device/pci.h> @@ -18,7 +18,7 @@ #include <cpu/x86/lapic.h> #include <cpu/amd/msr.h> #include <cpu/amd/mtrr.h> -#include <arch/acpigen.h> +#include <acpi/acpigen.h> #include <northbridge/amd/pi/nb_common.h> #include <northbridge/amd/agesa/agesa_helper.h> diff --git a/src/northbridge/amd/pi/00730F01/northbridge.c b/src/northbridge/amd/pi/00730F01/northbridge.c index fa49fc934e..74fd8c61b1 100644 --- a/src/northbridge/amd/pi/00730F01/northbridge.c +++ b/src/northbridge/amd/pi/00730F01/northbridge.c @@ -4,8 +4,8 @@ #include <commonlib/helpers.h> #include <console/console.h> #include <device/pci_ops.h> -#include <arch/acpi.h> -#include <arch/acpi_ivrs.h> +#include <acpi/acpi.h> +#include <acpi/acpi_ivrs.h> #include <arch/ioapic.h> #include <stdint.h> #include <device/device.h> @@ -22,7 +22,7 @@ #include <cpu/x86/lapic.h> #include <cpu/amd/msr.h> #include <cpu/amd/mtrr.h> -#include <arch/acpigen.h> +#include <acpi/acpigen.h> #include <northbridge/amd/pi/nb_common.h> #include <northbridge/amd/agesa/agesa_helper.h> #include <southbridge/amd/pi/hudson/pci_devs.h> |