summaryrefslogtreecommitdiff
path: root/src/northbridge/amd
diff options
context:
space:
mode:
authorElyes HAOUAS <ehaouas@noos.fr>2018-05-20 11:28:10 +0200
committerKyösti Mälkki <kyosti.malkki@gmail.com>2018-05-21 20:28:10 +0000
commite4988ccf06c198b3aa311f4b6d84fd20b53a0aa4 (patch)
tree7abc230decbe906997c63c8afa1cbd3ffb22bb54 /src/northbridge/amd
parent1c56f2fe77ea9fb30f277e08a40245b0751471bd (diff)
downloadcoreboot-e4988ccf06c198b3aa311f4b6d84fd20b53a0aa4.tar.xz
nb/amd/amdk8: Get rid of device_t
Use of device_t has been abandoned in ramstage. Change-Id: If540a8b0afb93c1ba8e901c4771228a43c1e6a14 Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr> Reviewed-on: https://review.coreboot.org/26427 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Diffstat (limited to 'src/northbridge/amd')
-rw-r--r--src/northbridge/amd/amdk8/acpi.c10
-rw-r--r--src/northbridge/amd/amdk8/acpi.h6
-rw-r--r--src/northbridge/amd/amdk8/get_sblk_pci1234.c2
-rw-r--r--src/northbridge/amd/amdk8/misc_control.c8
-rw-r--r--src/northbridge/amd/amdk8/northbridge.c73
-rw-r--r--src/northbridge/amd/amdk8/northbridge.h2
-rw-r--r--src/northbridge/amd/amdk8/util.c10
7 files changed, 59 insertions, 52 deletions
diff --git a/src/northbridge/amd/amdk8/acpi.c b/src/northbridge/amd/amdk8/acpi.c
index 2fbe7aa19a..0d42911697 100644
--- a/src/northbridge/amd/amdk8/acpi.c
+++ b/src/northbridge/amd/amdk8/acpi.c
@@ -33,7 +33,7 @@
unsigned long acpi_create_madt_lapic_nmis(unsigned long current, u16 flags, u8 lint)
{
- device_t cpu;
+ struct device *cpu;
int cpu_index = 0;
for (cpu = all_devices; cpu; cpu = cpu->next) {
@@ -52,7 +52,7 @@ unsigned long acpi_create_madt_lapic_nmis(unsigned long current, u16 flags, u8 l
unsigned long acpi_create_srat_lapics(unsigned long current)
{
- device_t cpu;
+ struct device *cpu;
int cpu_index = 0;
for (cpu = all_devices; cpu; cpu = cpu->next) {
@@ -171,7 +171,7 @@ static unsigned long acpi_fill_slit(unsigned long current)
}
unsigned long northbridge_write_acpi_tables(
- device_t device,
+ struct device *device,
unsigned long start,
acpi_rsdp_t *rsdp)
{
@@ -230,7 +230,7 @@ static void k8acpi_write_HT(void) {
}
static void k8acpi_write_pci_data(int dlen, const char *name, int offset) {
- device_t dev;
+ struct device *dev;
uint32_t dword;
int i;
@@ -246,7 +246,7 @@ static void k8acpi_write_pci_data(int dlen, const char *name, int offset) {
acpigen_pop_len();
}
-void k8acpi_write_vars(device_t device)
+void k8acpi_write_vars(struct device *device)
{
/*
* If more than one physical CPU is installed k8acpi_write_vars()
diff --git a/src/northbridge/amd/amdk8/acpi.h b/src/northbridge/amd/amdk8/acpi.h
index 80e88c18f0..934792d1cc 100644
--- a/src/northbridge/amd/amdk8/acpi.h
+++ b/src/northbridge/amd/amdk8/acpi.h
@@ -17,7 +17,9 @@
#define AMDK8_ACPI_H
#include <arch/acpigen.h>
-void k8acpi_write_vars(device_t device);
-unsigned long northbridge_write_acpi_tables(device_t device, unsigned long start, acpi_rsdp_t *rsdp);
+void k8acpi_write_vars(struct device *device);
+unsigned long northbridge_write_acpi_tables(struct device *device,
+ unsigned long start,
+ acpi_rsdp_t *rsdp);
#endif
diff --git a/src/northbridge/amd/amdk8/get_sblk_pci1234.c b/src/northbridge/amd/amdk8/get_sblk_pci1234.c
index 1343ae4028..fd9584f349 100644
--- a/src/northbridge/amd/amdk8/get_sblk_pci1234.c
+++ b/src/northbridge/amd/amdk8/get_sblk_pci1234.c
@@ -142,7 +142,7 @@
void get_sblk_pci1234(void)
{
- device_t dev;
+ struct device *dev;
int i,j;
uint32_t dword;
diff --git a/src/northbridge/amd/amdk8/misc_control.c b/src/northbridge/amd/amdk8/misc_control.c
index c472edfd13..9d2270da39 100644
--- a/src/northbridge/amd/amdk8/misc_control.c
+++ b/src/northbridge/amd/amdk8/misc_control.c
@@ -35,7 +35,7 @@
* implemented in a way to NOT DOING legacy VGA resource allocation on
* purpose :-(.
*/
-static void mcf3_read_resources(device_t dev)
+static void mcf3_read_resources(struct device *dev)
{
struct resource *resource;
unsigned char iommu;
@@ -61,13 +61,13 @@ static void mcf3_read_resources(device_t dev)
}
}
-static void set_agp_aperture(device_t dev)
+static void set_agp_aperture(struct device *dev)
{
struct resource *resource;
resource = probe_resource(dev, 0x94);
if (resource) {
- device_t pdev;
+ struct device *pdev;
uint32_t gart_base, gart_acr;
/* Remember this resource has been stored */
@@ -97,7 +97,7 @@ static void set_agp_aperture(device_t dev)
}
}
-static void mcf3_set_resources(device_t dev)
+static void mcf3_set_resources(struct device *dev)
{
/* Set the gart apeture */
set_agp_aperture(dev);
diff --git a/src/northbridge/amd/amdk8/northbridge.c b/src/northbridge/amd/amdk8/northbridge.c
index 0a16db4ea7..4d37098733 100644
--- a/src/northbridge/amd/amdk8/northbridge.c
+++ b/src/northbridge/amd/amdk8/northbridge.c
@@ -40,8 +40,8 @@
struct amdk8_sysconf_t sysconf;
#define MAX_FX_DEVS 8
-static device_t __f0_dev[MAX_FX_DEVS];
-static device_t __f1_dev[MAX_FX_DEVS];
+static struct device *__f0_dev[MAX_FX_DEVS];
+static struct device *__f1_dev[MAX_FX_DEVS];
static unsigned fx_devs = 0;
static void get_fx_devs(void)
@@ -71,7 +71,7 @@ static void f1_write_config32(unsigned reg, u32 value)
if (fx_devs == 0)
get_fx_devs();
for (i = 0; i < fx_devs; i++) {
- device_t dev;
+ struct device *dev;
dev = __f1_dev[i];
if (dev && dev->enabled) {
pci_write_config32(dev, reg, value);
@@ -127,7 +127,7 @@ static void ht_route_link(struct bus *link, scan_state mode)
}
}
-static u32 amdk8_nodeid(device_t dev)
+static u32 amdk8_nodeid(struct device *dev)
{
return (dev->path.pci.devfn >> 3) - 0x18;
}
@@ -245,7 +245,7 @@ static void trim_ht_chain(struct device *dev)
}
}
-static void amdk8_scan_chains(device_t dev)
+static void amdk8_scan_chains(struct device *dev)
{
struct bus *link;
@@ -258,15 +258,15 @@ static void amdk8_scan_chains(device_t dev)
}
-static int reg_useable(unsigned reg, device_t goal_dev, unsigned goal_nodeid,
- unsigned goal_link)
+static int reg_useable(unsigned reg, struct device *goal_dev,
+ unsigned goal_nodeid, unsigned goal_link)
{
struct resource *res;
unsigned nodeid, link = 0;
int result;
res = 0;
for (nodeid = 0; !res && (nodeid < fx_devs); nodeid++) {
- device_t dev;
+ struct device *dev;
dev = __f0_dev[nodeid];
if (!dev)
continue;
@@ -286,8 +286,8 @@ static int reg_useable(unsigned reg, device_t goal_dev, unsigned goal_nodeid,
return result;
}
-static unsigned amdk8_find_reg(device_t dev, unsigned nodeid, unsigned link,
- unsigned min, unsigned max)
+static unsigned amdk8_find_reg(struct device *dev, unsigned nodeid,
+ unsigned link, unsigned min, unsigned max)
{
unsigned resource;
unsigned free_reg, reg;
@@ -314,17 +314,20 @@ static unsigned amdk8_find_reg(device_t dev, unsigned nodeid, unsigned link,
return resource;
}
-static unsigned amdk8_find_iopair(device_t dev, unsigned nodeid, unsigned link)
+static unsigned amdk8_find_iopair(struct device *dev, unsigned nodeid,
+ unsigned link)
{
return amdk8_find_reg(dev, nodeid, link, 0xc0, 0xd8);
}
-static unsigned amdk8_find_mempair(device_t dev, unsigned nodeid, unsigned link)
+static unsigned amdk8_find_mempair(struct device *dev, unsigned nodeid,
+ unsigned link)
{
return amdk8_find_reg(dev, nodeid, link, 0x80, 0xb8);
}
-static void amdk8_link_read_bases(device_t dev, unsigned nodeid, unsigned link)
+static void amdk8_link_read_bases(struct device *dev, unsigned nodeid,
+ unsigned link)
{
struct resource *resource;
@@ -363,9 +366,9 @@ static void amdk8_link_read_bases(device_t dev, unsigned nodeid, unsigned link)
}
}
-static void amdk8_create_vga_resource(device_t dev, unsigned nodeid);
+static void amdk8_create_vga_resource(struct device *dev, unsigned nodeid);
-static void amdk8_read_resources(device_t dev)
+static void amdk8_read_resources(struct device *dev)
{
unsigned nodeid;
struct bus *link;
@@ -378,7 +381,8 @@ static void amdk8_read_resources(device_t dev)
amdk8_create_vga_resource(dev, nodeid);
}
-static void amdk8_set_resource(device_t dev, struct resource *resource, unsigned nodeid)
+static void amdk8_set_resource(struct device *dev, struct resource *resource,
+ unsigned nodeid)
{
struct bus *link;
resource_t rbase, rend;
@@ -475,7 +479,7 @@ static void amdk8_set_resource(device_t dev, struct resource *resource, unsigned
report_resource_stored(dev, resource, buf);
}
-static void amdk8_create_vga_resource(device_t dev, unsigned nodeid)
+static void amdk8_create_vga_resource(struct device *dev, unsigned nodeid)
{
struct resource *resource;
struct bus *link;
@@ -485,7 +489,7 @@ static void amdk8_create_vga_resource(device_t dev, unsigned nodeid)
for (link = dev->link_list; link; link = link->next) {
if (link->bridge_ctrl & PCI_BRIDGE_CTL_VGA) {
#if IS_ENABLED(CONFIG_MULTIPLE_VGA_ADAPTERS)
- extern device_t vga_pri; // the primary vga device, defined in device.c
+ extern struct device *vga_pri; // the primary vga device, defined in device.c
printk(BIOS_DEBUG, "VGA: vga_pri bus num = %d link bus range [%d,%d]\n", vga_pri->bus->secondary,
link->secondary,link->subordinate);
/* We need to make sure the vga_pri is under the link */
@@ -516,7 +520,7 @@ static void amdk8_create_vga_resource(device_t dev, unsigned nodeid)
IORESOURCE_ASSIGNED;
}
-static void amdk8_set_resources(device_t dev)
+static void amdk8_set_resources(struct device *dev)
{
unsigned nodeid;
struct bus *bus;
@@ -597,7 +601,7 @@ struct chip_operations northbridge_amd_amdk8_ops = {
.init = amdk8_nb_init,
};
-static void amdk8_domain_read_resources(device_t dev)
+static void amdk8_domain_read_resources(struct device *dev)
{
unsigned reg;
@@ -610,7 +614,7 @@ static void amdk8_domain_read_resources(device_t dev)
/* Is this register allocated? */
if ((base & 3) != 0) {
unsigned nodeid, reg_link;
- device_t reg_dev;
+ struct device *reg_dev;
nodeid = limit & 7;
reg_link = (limit >> 4) & 3;
reg_dev = __f0_dev[nodeid];
@@ -717,7 +721,7 @@ static struct hw_mem_hole_info get_hw_mem_hole_info(void)
static void disable_hoist_memory(unsigned long hole_startk, int node_id)
{
int i;
- device_t dev;
+ struct device *dev;
u32 base, limit;
u32 hoist;
u32 hole_sizek;
@@ -762,7 +766,7 @@ static u32 hoist_memory(unsigned long hole_startk, int node_id)
{
int i;
u32 carry_over;
- device_t dev;
+ struct device *dev;
u32 base, limit;
u32 basek;
u32 hoist;
@@ -857,7 +861,7 @@ static void setup_uma_memory(void)
#endif
}
-static void amdk8_domain_set_resources(device_t dev)
+static void amdk8_domain_set_resources(struct device *dev)
{
unsigned long mmio_basek;
u32 pci_tolm;
@@ -1009,7 +1013,7 @@ static void amdk8_domain_set_resources(device_t dev)
}
-static void amdk8_domain_scan_bus(device_t dev)
+static void amdk8_domain_scan_bus(struct device *dev)
{
u32 reg;
int i;
@@ -1029,7 +1033,7 @@ static void amdk8_domain_scan_bus(device_t dev)
*/
get_fx_devs();
for (i = 0; i < fx_devs; i++) {
- device_t f0_dev;
+ struct device *f0_dev;
f0_dev = __f0_dev[i];
if (f0_dev && f0_dev->enabled) {
u32 httc;
@@ -1055,7 +1059,7 @@ static struct device_operations pci_domain_ops = {
.scan_bus = amdk8_domain_scan_bus,
};
-static void add_more_links(device_t dev, unsigned total_links)
+static void add_more_links(struct device *dev, unsigned total_links)
{
struct bus *link, *last = NULL;
int link_num = -1;
@@ -1095,7 +1099,7 @@ static void add_more_links(device_t dev, unsigned total_links)
static void remap_bsp_lapic(struct bus *cpu_bus)
{
struct device_path cpu_path;
- device_t cpu;
+ struct device *cpu;
u32 bsp_lapic_id = lapicid();
if (bsp_lapic_id) {
@@ -1107,10 +1111,10 @@ static void remap_bsp_lapic(struct bus *cpu_bus)
}
}
-static void cpu_bus_scan(device_t dev)
+static void cpu_bus_scan(struct device *dev)
{
struct bus *cpu_bus;
- device_t dev_mc;
+ struct device *dev_mc;
int bsp_apicid;
int i,j;
unsigned nb_cfg_54;
@@ -1165,7 +1169,7 @@ static void cpu_bus_scan(device_t dev)
remap_bsp_lapic(cpu_bus);
for (i = 0; i < sysconf.nodes; i++) {
- device_t cpu_dev;
+ struct device *cpu_dev;
/* Find the cpu's pci device */
cpu_dev = dev_find_slot(0, PCI_DEVFN(0x18 + i, 3));
@@ -1174,7 +1178,7 @@ static void cpu_bus_scan(device_t dev)
* ensure all of the cpu's pci devices are found.
*/
int local_j;
- device_t dev_f0;
+ struct device *dev_f0;
for (local_j = 0; local_j <= 3; local_j++) {
cpu_dev = pci_probe_dev(NULL, dev_mc->bus,
PCI_DEVFN(0x18 + i, local_j));
@@ -1241,14 +1245,15 @@ static void cpu_bus_scan(device_t dev)
}
}
- device_t cpu = add_cpu_device(cpu_bus, apic_id, enable_node);
+ struct device *cpu = add_cpu_device(cpu_bus, apic_id,
+ enable_node);
if (cpu)
amd_cpu_topology(cpu, i, j);
} //j
}
}
-static void cpu_bus_init(device_t dev)
+static void cpu_bus_init(struct device *dev)
{
#if IS_ENABLED(CONFIG_WAIT_BEFORE_CPUS_INIT)
cpus_ready_for_init();
diff --git a/src/northbridge/amd/amdk8/northbridge.h b/src/northbridge/amd/amdk8/northbridge.h
index b39a59475c..99bfe4fc15 100644
--- a/src/northbridge/amd/amdk8/northbridge.h
+++ b/src/northbridge/amd/amdk8/northbridge.h
@@ -1,6 +1,6 @@
#ifndef NORTHBRIDGE_AMD_AMDK8_H
#define NORTHBRIDGE_AMD_AMDK8_H
-extern unsigned int amdk8_scan_root_bus(device_t root, unsigned int max);
+extern unsigned int amdk8_scan_root_bus(struct device *root, unsigned int max);
#endif /* NORTHBRIDGE_AMD_AMDK8_H */
diff --git a/src/northbridge/amd/amdk8/util.c b/src/northbridge/amd/amdk8/util.c
index b701c7f707..aea046935c 100644
--- a/src/northbridge/amd/amdk8/util.c
+++ b/src/northbridge/amd/amdk8/util.c
@@ -189,7 +189,7 @@ static void showmmio(int level, u8 which, u32 base, u32 lim)
* @param dev A 32-bit number in the standard bus/dev/fn format which is used
* raw config space.
*/
-static void showalldram(int level, device_t dev)
+static void showalldram(int level, struct device *dev)
{
u8 reg;
for (reg = DRAM_ROUTE_START; reg <= DRAM_ROUTE_END; reg += 8) {
@@ -207,7 +207,7 @@ static void showalldram(int level, device_t dev)
* @param dev A 32-bit number in the standard bus/dev/fn format which is used
* raw config space.
*/
-static void showallmmio(int level, device_t dev)
+static void showallmmio(int level, struct device *dev)
{
u8 reg;
for (reg = MMIO_ROUTE_START; reg <= MMIO_ROUTE_END; reg += 8) {
@@ -225,7 +225,7 @@ static void showallmmio(int level, device_t dev)
* @param dev A 32-bit number in the standard bus/dev/fn format which is used
* raw config space.
*/
-static void showallpciio(int level, device_t dev)
+static void showallpciio(int level, struct device *dev)
{
u8 reg;
for (reg = PCIIO_ROUTE_START; reg <= PCIIO_ROUTE_END; reg += 8) {
@@ -243,7 +243,7 @@ static void showallpciio(int level, device_t dev)
* @param dev A 32-bit number in the standard bus/dev/fn format which is used
* raw config space.
*/
-static void showallconfig(int level, device_t dev)
+static void showallconfig(int level, struct device *dev)
{
u8 reg;
for (reg = CONFIG_ROUTE_START; reg <= CONFIG_ROUTE_END; reg += 4) {
@@ -260,7 +260,7 @@ static void showallconfig(int level, device_t dev)
* @param dev A 32-bit number in the standard bus/dev/fn format which is used
* raw config space.
*/
-void showallroutes(int level, device_t dev)
+void showallroutes(int level, struct device *dev)
{
showalldram(level, dev);
showallmmio(level, dev);