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authorPatrick Georgi <patrick@georgi-clan.de>2012-05-05 15:50:17 +0200
committerStefan Reinauer <stefan.reinauer@coreboot.org>2012-05-08 00:38:11 +0200
commitf8f00629e3b5e129a5962fed1b886034f45e844a (patch)
treededa750cdf6f034467d33d73daa1481832df33d2 /src/northbridge/amd
parentc0e16e7024fbeb11975f0834a5d5d6c0d9f2e34e (diff)
downloadcoreboot-f8f00629e3b5e129a5962fed1b886034f45e844a.tar.xz
Some more #if cleanup
Replace #elif (CONFIG_FOO==1) with #elif CONFIG_FOO find src -type f -exec sed -i "s,\(#.*\)(\(CONFIG_[A-Z0-9_]*\)[[:space:]]*==[[:space:]]1),\1\2,g" {} + (manual tweak since it hit a false positive) Replace #elif (CONFIG_FOO==0) with #elif !CONFIG_FOO find src -type f -exec sed -i "s,\(#.*\)(\(CONFIG_[A-Z0-9_]*\)[[:space:]]*==[[:space:]]0),\1\!\2,g" {} + Change-Id: I8f4ebf609740dfc53e79d5f1e60f9446364bb07d Signed-off-by: Patrick Georgi <patrick@georgi-clan.de> Reviewed-on: http://review.coreboot.org/1006 Tested-by: build bot (Jenkins) Reviewed-by: Ronald G. Minnich <rminnich@gmail.com> Reviewed-by: Martin Roth <martin@se-eng.com> Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Diffstat (limited to 'src/northbridge/amd')
-rw-r--r--src/northbridge/amd/amdfam10/northbridge.c2
-rw-r--r--src/northbridge/amd/amdk8/coherent_ht.c10
-rw-r--r--src/northbridge/amd/amdmct/wrappers/mcti_d.c10
3 files changed, 11 insertions, 11 deletions
diff --git a/src/northbridge/amd/amdfam10/northbridge.c b/src/northbridge/amd/amdfam10/northbridge.c
index 0e80c71324..3b20684e75 100644
--- a/src/northbridge/amd/amdfam10/northbridge.c
+++ b/src/northbridge/amd/amdfam10/northbridge.c
@@ -1425,7 +1425,7 @@ static u32 cpu_bus_scan(device_t dev, u32 max)
if (cpu) {
cpu->path.apic.node_id = i;
cpu->path.apic.core_id = j;
- #if (CONFIG_ENABLE_APIC_EXT_ID == 1) && (CONFIG_APIC_ID_OFFSET>0)
+ #if CONFIG_ENABLE_APIC_EXT_ID && (CONFIG_APIC_ID_OFFSET>0)
if(sysconf.enabled_apic_ext_id) {
if(sysconf.lift_bsp_apicid) {
cpu->path.apic.apic_id += sysconf.apicid_offset;
diff --git a/src/northbridge/amd/amdk8/coherent_ht.c b/src/northbridge/amd/amdk8/coherent_ht.c
index 636114df15..9ad342367c 100644
--- a/src/northbridge/amd/amdk8/coherent_ht.c
+++ b/src/northbridge/amd/amdk8/coherent_ht.c
@@ -394,7 +394,7 @@ static uint8_t get_linkn_last(uint8_t byte)
}
#endif
-#if (CONFIG_MAX_PHYSICAL_CPUS > 2) || (CONFIG_MAX_PHYSICAL_CPUS_4_BUT_MORE_INSTALLED == 1)
+#if (CONFIG_MAX_PHYSICAL_CPUS > 2) || CONFIG_MAX_PHYSICAL_CPUS_4_BUT_MORE_INSTALLED
static uint8_t get_linkn_last_count(uint8_t byte)
{
byte &= 0x0f;
@@ -563,7 +563,7 @@ static void setup_row_indirect_x(u8 temp, u8 source, u8 dest, u8 gateway, u8 dif
if(diff && (val_s!=(val&0xff)) ) { /* use another connect as response*/
val_s -= val & 0xff;
-#if (CONFIG_MAX_PHYSICAL_CPUS > 4) || (CONFIG_MAX_PHYSICAL_CPUS_4_BUT_MORE_INSTALLED == 1)
+#if (CONFIG_MAX_PHYSICAL_CPUS > 4) || CONFIG_MAX_PHYSICAL_CPUS_4_BUT_MORE_INSTALLED
uint8_t byte;
/* Some node have two links left
* don't worry we only have (2, (3 as source need to handle
@@ -722,7 +722,7 @@ static unsigned setup_smp2(void)
setup_row_local(7,1);
setup_remote_row_direct(1, 0, byte);
-#if (CONFIG_MAX_PHYSICAL_CPUS > 4) || (CONFIG_MAX_PHYSICAL_CPUS_4_BUT_MORE_INSTALLED == 1)
+#if (CONFIG_MAX_PHYSICAL_CPUS > 4) || CONFIG_MAX_PHYSICAL_CPUS_4_BUT_MORE_INSTALLED
val = get_row(7,1);
byte = (val>>16) & 0xfe;
byte = get_linkn_last_count(byte);
@@ -848,7 +848,7 @@ static unsigned setup_smp4(void)
setup_temp_row(2,3);
verify_connection(7); /* to 3*/
-#if (CONFIG_MAX_PHYSICAL_CPUS > 4) || (CONFIG_MAX_PHYSICAL_CPUS_4_BUT_MORE_INSTALLED == 1)
+#if (CONFIG_MAX_PHYSICAL_CPUS > 4) || CONFIG_MAX_PHYSICAL_CPUS_4_BUT_MORE_INSTALLED
/* We need to find out which link is to node3 */
if((byte>>2)==2) { /* one to node3, one to node0, one to node4*/
val = get_row(7,3);
@@ -869,7 +869,7 @@ static unsigned setup_smp4(void)
print_linkn("(3,2) link=", byte);
setup_remote_row_direct(3,2, byte);
-#if (CONFIG_MAX_PHYSICAL_CPUS > 4) || (CONFIG_MAX_PHYSICAL_CPUS_4_BUT_MORE_INSTALLED == 1)
+#if (CONFIG_MAX_PHYSICAL_CPUS > 4) || CONFIG_MAX_PHYSICAL_CPUS_4_BUT_MORE_INSTALLED
/* set link from 3 to 5 before enable it*/
val = get_row(7,3);
byte = ((val>>16) & 0xfe) - link_connection(7,2) - link_connection(7,1);
diff --git a/src/northbridge/amd/amdmct/wrappers/mcti_d.c b/src/northbridge/amd/amdmct/wrappers/mcti_d.c
index 00b15556ca..2440d2e8ed 100644
--- a/src/northbridge/amd/amdmct/wrappers/mcti_d.c
+++ b/src/northbridge/amd/amdmct/wrappers/mcti_d.c
@@ -66,14 +66,14 @@ static u16 mctGet_NVbits(u8 index)
case NV_BYPMAX:
#if !CONFIG_GFXUMA
val = 4;
-#elif (CONFIG_GFXUMA == 1)
+#elif CONFIG_GFXUMA
val = 7;
#endif
break;
case NV_RDWRQBYP:
#if !CONFIG_GFXUMA
val = 2;
-#elif (CONFIG_GFXUMA == 1)
+#elif CONFIG_GFXUMA
val = 3;
#endif
break;
@@ -115,7 +115,7 @@ static u16 mctGet_NVbits(u8 index)
case NV_BurstLen32:
#if !CONFIG_GFXUMA
val = 0; /* 64 byte mode */
-#elif (CONFIG_GFXUMA == 1)
+#elif CONFIG_GFXUMA
val = 1; /* 32 byte mode */
#endif
break;
@@ -134,14 +134,14 @@ static u16 mctGet_NVbits(u8 index)
case NV_BottomIO:
#if !CONFIG_GFXUMA
val = 0xE0; /* address bits [31:24] */
-#elif (CONFIG_GFXUMA == 1)
+#elif CONFIG_GFXUMA
val = 0xC0; /* address bits [31:24] */
#endif
break;
case NV_BottomUMA:
#if !CONFIG_GFXUMA
val = 0xE0; /* address bits [31:24] */
-#elif (CONFIG_GFXUMA == 1)
+#elif CONFIG_GFXUMA
val = 0xC0; /* address bits [31:24] */
#endif
break;