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authorMartin Roth <gaumless@gmail.com>2015-04-26 18:53:26 -0600
committerMartin Roth <gaumless@gmail.com>2015-04-28 21:14:56 +0200
commit595e7777e7282249b13c3d7f8a45178e76798690 (patch)
tree3f578e46e4ba70ab530e2173845423597d536bec /src/northbridge/amd
parent562d6f30a0745b3da4c61974f8ac1b529dac9d80 (diff)
downloadcoreboot-595e7777e7282249b13c3d7f8a45178e76798690.tar.xz
Kconfig whitespace fixes
trivial whitespace fixes. Mostly changing leading spaces to tabs. Change-Id: I0bdfe2059b90725e64adfc0bdde785b4e406969d Signed-off-by: Martin Roth <gaumless@gmail.com> Reviewed-on: http://review.coreboot.org/10000 Tested-by: build bot (Jenkins) Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Diffstat (limited to 'src/northbridge/amd')
-rw-r--r--src/northbridge/amd/amdfam10/Kconfig10
-rw-r--r--src/northbridge/amd/amdk8/Kconfig4
-rw-r--r--src/northbridge/amd/cimx/rd890/Kconfig2
-rw-r--r--src/northbridge/amd/pi/Kconfig4
4 files changed, 10 insertions, 10 deletions
diff --git a/src/northbridge/amd/amdfam10/Kconfig b/src/northbridge/amd/amdfam10/Kconfig
index 37993aa709..e0942869aa 100644
--- a/src/northbridge/amd/amdfam10/Kconfig
+++ b/src/northbridge/amd/amdfam10/Kconfig
@@ -58,8 +58,8 @@ config RAMTOP
default 0x400000
config BOOTBLOCK_NORTHBRIDGE_INIT
- string
- default "northbridge/amd/amdfam10/bootblock.c"
+ string
+ default "northbridge/amd/amdfam10/bootblock.c"
config SB_HT_CHAIN_UNITID_OFFSET_ONLY
bool
@@ -112,9 +112,9 @@ endif
config SVI_HIGH_FREQ
bool
default n
- help
- Select this for boards with a Voltage Regulator able to operate
- at 3.4 MHz in SVI mode. Ignored unless the AMD CPU is rev C3.
+ help
+ Select this for boards with a Voltage Regulator able to operate
+ at 3.4 MHz in SVI mode. Ignored unless the AMD CPU is rev C3.
menu "HyperTransport setup"
#could be implemented for K8 (NORTHBRIDGE_AMD_AMDK8)
diff --git a/src/northbridge/amd/amdk8/Kconfig b/src/northbridge/amd/amdk8/Kconfig
index 65dc1736d8..23fa390d32 100644
--- a/src/northbridge/amd/amdk8/Kconfig
+++ b/src/northbridge/amd/amdk8/Kconfig
@@ -58,8 +58,8 @@ config HW_MEM_HOLE_SIZE_AUTO_INC
default n
config BOOTBLOCK_NORTHBRIDGE_INIT
- string
- default "northbridge/amd/amdk8/bootblock.c"
+ string
+ default "northbridge/amd/amdk8/bootblock.c"
config SB_HT_CHAIN_UNITID_OFFSET_ONLY
bool
diff --git a/src/northbridge/amd/cimx/rd890/Kconfig b/src/northbridge/amd/cimx/rd890/Kconfig
index 9642416631..04e9950d45 100644
--- a/src/northbridge/amd/cimx/rd890/Kconfig
+++ b/src/northbridge/amd/cimx/rd890/Kconfig
@@ -31,6 +31,6 @@ config REDIRECT_NBCIMX_TRACE_TO_SERIAL
This Option allows you to redirect the AMD Northbridge CIMX
Trace debug information to the serial console.
- Warning: Only enable this option when debuging or tracing AMD CIMX code.
+ Warning: Only enable this option when debuging or tracing AMD CIMX code.
endif # NORTHBRIDGE_AMD_CIMX_RD890
diff --git a/src/northbridge/amd/pi/Kconfig b/src/northbridge/amd/pi/Kconfig
index d071334315..62bd880fee 100644
--- a/src/northbridge/amd/pi/Kconfig
+++ b/src/northbridge/amd/pi/Kconfig
@@ -18,8 +18,8 @@
#
config NORTHBRIDGE_AMD_PI
- bool
- default CPU_AMD_PI
+ bool
+ default CPU_AMD_PI
select LATE_CBMEM_INIT
if NORTHBRIDGE_AMD_PI