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authorMyles Watson <mylesgw@gmail.com>2010-04-30 17:11:03 +0000
committerMyles Watson <mylesgw@gmail.com>2010-04-30 17:11:03 +0000
commitad894c54492781253cb7e01373a9d5d2f039f753 (patch)
treee98b3f5714627d152a5eaa64b053340e28299ab1 /src/northbridge/amd
parent636d9244259a86afd5af64268c5f6ab660d522fa (diff)
downloadcoreboot-ad894c54492781253cb7e01373a9d5d2f039f753.tar.xz
Get rid of a few more warnings.
Signed-off-by: Myles Watson <mylesgw@gmail.com> Acked-by: Myles Watson <mylesgw@gmail.com> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5512 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Diffstat (limited to 'src/northbridge/amd')
-rw-r--r--src/northbridge/amd/amdfam10/Makefile.inc1
-rw-r--r--src/northbridge/amd/amdfam10/debug.c2
-rw-r--r--src/northbridge/amd/amdfam10/get_pci1234.c1
-rw-r--r--src/northbridge/amd/amdfam10/northbridge.h1
-rw-r--r--src/northbridge/amd/amdk8/raminit_f.c4
-rw-r--r--src/northbridge/amd/amdk8/raminit_f_dqs.c2
-rw-r--r--src/northbridge/amd/amdmct/mct/mct_d.c4
7 files changed, 8 insertions, 7 deletions
diff --git a/src/northbridge/amd/amdfam10/Makefile.inc b/src/northbridge/amd/amdfam10/Makefile.inc
index 54dc2e97b4..c73f82a52c 100644
--- a/src/northbridge/amd/amdfam10/Makefile.inc
+++ b/src/northbridge/amd/amdfam10/Makefile.inc
@@ -10,4 +10,3 @@ obj-$(CONFIG_GENERATE_ACPI_TABLES) += sspr4.o
obj-$(CONFIG_GENERATE_ACPI_TABLES) += sspr5.o
obj-y += get_pci1234.o
-
diff --git a/src/northbridge/amd/amdfam10/debug.c b/src/northbridge/amd/amdfam10/debug.c
index cab2ec86d9..7aa7751820 100644
--- a/src/northbridge/amd/amdfam10/debug.c
+++ b/src/northbridge/amd/amdfam10/debug.c
@@ -26,7 +26,7 @@
static inline void print_debug_addr(const char *str, void *val)
{
-#if CACHE_AS_RAM_ADDRESS_DEBUG == 1
+#if defined(CACHE_AS_RAM_ADDRESS_DEBUG) && CACHE_AS_RAM_ADDRESS_DEBUG == 1
printk(BIOS_DEBUG, "------Address debug: %s%p------\n", str, val);
#endif
}
diff --git a/src/northbridge/amd/amdfam10/get_pci1234.c b/src/northbridge/amd/amdfam10/get_pci1234.c
index fa2e56065d..3c6143be2f 100644
--- a/src/northbridge/amd/amdfam10/get_pci1234.c
+++ b/src/northbridge/amd/amdfam10/get_pci1234.c
@@ -55,6 +55,7 @@
*
*/
+#include "northbridge.h"
void get_pci1234(void)
{
diff --git a/src/northbridge/amd/amdfam10/northbridge.h b/src/northbridge/amd/amdfam10/northbridge.h
index 053ac3bd02..c30c99f6c9 100644
--- a/src/northbridge/amd/amdfam10/northbridge.h
+++ b/src/northbridge/amd/amdfam10/northbridge.h
@@ -21,5 +21,6 @@
#define NORTHBRIDGE_AMD_AMDFAM10_H
u32 amdfam10_scan_root_bus(device_t root, u32 max);
+void get_pci1234(void);
#endif /* NORTHBRIDGE_AMD_AMDFAM10_H */
diff --git a/src/northbridge/amd/amdk8/raminit_f.c b/src/northbridge/amd/amdk8/raminit_f.c
index b89aa38d6a..6652783e66 100644
--- a/src/northbridge/amd/amdk8/raminit_f.c
+++ b/src/northbridge/amd/amdk8/raminit_f.c
@@ -2511,9 +2511,8 @@ static void set_misc_timing(const struct mem_controller *ctrl, struct mem_info *
unsigned SlowAccessMode = 0;
#endif
- long dimm_mask = meminfo->dimm_mask & 0x0f;
-
#if CONFIG_DIMM_SUPPORT==0x0104 /* DDR2 and REG */
+ long dimm_mask = meminfo->dimm_mask & 0x0f;
/* for REG DIMM */
dword = 0x00111222;
dwordx = 0x002f0000;
@@ -2578,6 +2577,7 @@ static void set_misc_timing(const struct mem_controller *ctrl, struct mem_info *
#endif
#if CONFIG_DIMM_SUPPORT==0x0004 /* DDR2 and unbuffered */
+ long dimm_mask = meminfo->dimm_mask & 0x0f;
/* for UNBUF DIMM */
dword = 0x00111222;
dwordx = 0x002f2f00;
diff --git a/src/northbridge/amd/amdk8/raminit_f_dqs.c b/src/northbridge/amd/amdk8/raminit_f_dqs.c
index c56e51deb0..81e38ecc6d 100644
--- a/src/northbridge/amd/amdk8/raminit_f_dqs.c
+++ b/src/northbridge/amd/amdk8/raminit_f_dqs.c
@@ -528,7 +528,7 @@ static unsigned TrainRcvrEn(const struct mem_controller *ctrl, unsigned Pass, st
unsigned is_Width128 = sysinfo->meminfo[ctrl->node_id].is_Width128;
#if K8_REV_F_SUPPORT_F0_F1_WORKAROUND == 1
- unsigned cpu_f0_f1;
+ unsigned cpu_f0_f1 = 0;
#endif
if(Pass == DQS_FIRST_PASS) {
diff --git a/src/northbridge/amd/amdmct/mct/mct_d.c b/src/northbridge/amd/amdmct/mct/mct_d.c
index 3c4fa89e89..c56576aa6c 100644
--- a/src/northbridge/amd/amdmct/mct/mct_d.c
+++ b/src/northbridge/amd/amdmct/mct/mct_d.c
@@ -42,8 +42,6 @@ static void DQSTiming_D(struct MCTStatStruc *pMCTstat,
struct DCTStatStruc *pDCTstatA);
static void LoadDQSSigTmgRegs_D(struct MCTStatStruc *pMCTstat,
struct DCTStatStruc *pDCTstatA);
-static void ResetNBECCstat_D(struct MCTStatStruc *pMCTstat,
- struct DCTStatStruc *pDCTstatA);
static void HTMemMapInit_D(struct MCTStatStruc *pMCTstat,
struct DCTStatStruc *pDCTstatA);
static void MCTMemClr_D(struct MCTStatStruc *pMCTstat,
@@ -478,6 +476,8 @@ static void LoadDQSSigTmgRegs_D(struct MCTStatStruc *pMCTstat,
#ifdef UNUSED_CODE
static void ResetNBECCstat_D(struct MCTStatStruc *pMCTstat,
+ struct DCTStatStruc *pDCTstatA);
+static void ResetNBECCstat_D(struct MCTStatStruc *pMCTstat,
struct DCTStatStruc *pDCTstatA)
{
/* Clear MC4_STS for all Nodes in the system. This is required in some