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authorAlexandru Gagniuc <mr.nuke.me@gmail.com>2015-08-26 10:11:02 -0400
committerAlexandru Gagniuc <mr.nuke.me@gmail.com>2015-08-30 07:50:47 +0000
commitfdbc1af5e2c43ef223cc11ff98ee970423ae7797 (patch)
treec011e5655e54c19f94f91cb655a928e715f26dbc /src/northbridge/amd
parent4093148b260116ca8629ff9f7e335b4384247bd7 (diff)
downloadcoreboot-fdbc1af5e2c43ef223cc11ff98ee970423ae7797.tar.xz
Kconfig: Remove EXPERT mode
After much consideration, and many years of an EXPERT mode sitting almost completely unused, we've seen that it doesn't work for us. There is no standard on what constitutes EXPERT, and most of coreboot's options Kconfig are expert-level. We even joked that not selecting "EXPERT" should prevent coreboot from compiling: @echo $(shell whoami) is not permitted to compile coreboot Change-Id: Ic22dd54a48190b81d711625efb6b9f3078f41778 Signed-off-by: Alexandru Gagniuc <mr.nuke.me@gmail.com> Reviewed-on: http://review.coreboot.org/11365 Tested-by: build bot (Jenkins) Reviewed-by: Alexander Couzens <lynxis@fe80.eu>
Diffstat (limited to 'src/northbridge/amd')
-rw-r--r--src/northbridge/amd/amdfam10/Kconfig2
-rw-r--r--src/northbridge/amd/amdht/h3finit.c4
2 files changed, 3 insertions, 3 deletions
diff --git a/src/northbridge/amd/amdfam10/Kconfig b/src/northbridge/amd/amdfam10/Kconfig
index 13954d497c..4d7147d72f 100644
--- a/src/northbridge/amd/amdfam10/Kconfig
+++ b/src/northbridge/amd/amdfam10/Kconfig
@@ -120,7 +120,7 @@ config SVI_HIGH_FREQ
menu "HyperTransport setup"
#could be implemented for K8 (NORTHBRIDGE_AMD_AMDK8)
- depends on (NORTHBRIDGE_AMD_AMDFAM10) && EXPERT
+ depends on (NORTHBRIDGE_AMD_AMDFAM10)
choice
prompt "HyperTransport downlink width"
diff --git a/src/northbridge/amd/amdht/h3finit.c b/src/northbridge/amd/amdht/h3finit.c
index 0138cd9462..849f4a8dd1 100644
--- a/src/northbridge/amd/amdht/h3finit.c
+++ b/src/northbridge/amd/amdht/h3finit.c
@@ -1399,13 +1399,13 @@ static void selectOptimalWidthAndFrequency(sMainData *pDat)
cbPCBFreqLimit = ht_speed_mhz_to_hw(pDat->HtBlock->ht_link_configuration->ht_speed_limit);
cbPCBFreqLimit = min(cbPCBFreqLimit, cbPCBFreqLimit_NVRAM);
-#if CONFIG_EXPERT && CONFIG_LIMIT_HT_DOWN_WIDTH_8
+#if CONFIG_LIMIT_HT_DOWN_WIDTH_8
cbPCBABDownstreamWidth = 8;
#else
cbPCBABDownstreamWidth = 16;
#endif
-#if CONFIG_EXPERT && CONFIG_LIMIT_HT_UP_WIDTH_8
+#if CONFIG_LIMIT_HT_UP_WIDTH_8
cbPCBBAUpstreamWidth = 8;
#else
cbPCBBAUpstreamWidth = 16;