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authorElyes HAOUAS <ehaouas@noos.fr>2019-05-22 21:40:10 +0200
committerPatrick Georgi <pgeorgi@google.com>2019-05-24 09:34:48 +0000
commit7a5d4e2b4a5acbdad42c36cb4c33aab3b95af385 (patch)
tree23eed02a98fa877eef1b43c5c0042de5647dd6d2 /src/northbridge/amd
parentfa82e0db64f67fa7adb84bb423b23887a3dfed98 (diff)
downloadcoreboot-7a5d4e2b4a5acbdad42c36cb4c33aab3b95af385.tar.xz
nb/amd/amdmct/mct/mctecc_d.c: Remove variable set but not used
Change-Id: I309cf83a1fec16b796c72c1803d27e1b7932940f Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr> Reviewed-on: https://review.coreboot.org/c/coreboot/+/32947 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Marshall Dawson <marshalldawson3rd@gmail.com>
Diffstat (limited to 'src/northbridge/amd')
-rw-r--r--src/northbridge/amd/amdmct/mct/mctecc_d.c3
1 files changed, 1 insertions, 2 deletions
diff --git a/src/northbridge/amd/amdmct/mct/mctecc_d.c b/src/northbridge/amd/amdmct/mct/mctecc_d.c
index 7be63533a9..8eb7bf54b7 100644
--- a/src/northbridge/amd/amdmct/mct/mctecc_d.c
+++ b/src/northbridge/amd/amdmct/mct/mctecc_d.c
@@ -80,7 +80,6 @@ u8 ECCInit_D(struct MCTStatStruc *pMCTstat, struct DCTStatStruc *pDCTstatA)
u16 OB_ECCRedir;
u32 LDramECC;
u32 OF_ScrubCTL;
- u16 OB_ChipKill;
u8 MemClrECC;
u32 dev;
@@ -96,7 +95,7 @@ u8 ECCInit_D(struct MCTStatStruc *pMCTstat, struct DCTStatStruc *pDCTstatA)
OB_ECCRedir = mctGet_NVbits(NV_ECCRedir); /* ECC Redirection */
- OB_ChipKill = mctGet_NVbits(NV_ChipKill); /* ECC Chip-kill mode */
+ mctGet_NVbits(NV_ChipKill); /* ECC Chip-kill mode */
OF_ScrubCTL = 0; /* Scrub CTL for Dcache, L2, and dram */
nvbits = mctGet_NVbits(NV_DCBKScrub);