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| author | Timothy Pearson <tpearson@raptorengineeringinc.com> | 2015-08-20 12:49:49 -0500 |
|---|---|---|
| committer | Martin Roth <martinroth@google.com> | 2015-11-24 19:50:11 +0100 |
| commit | ab1e77fb01df5315fc291a801ca60db2582a111d (patch) | |
| tree | e54ef0acf28eee8215816822e53c86ceaf85cb6c /src/northbridge/amd | |
| parent | c8e10733596882f8751b774fe1ea71d9382ded07 (diff) | |
| download | coreboot-ab1e77fb01df5315fc291a801ca60db2582a111d.tar.xz | |
northbridge/amd/amdmct/mct_ddr3: Add CC6 setup information messages
Change-Id: I17660ce5429431e08476b7bba15e381636b64c7d
Signed-off-by: Timothy Pearson <tpearson@raptorengineeringinc.com>
Reviewed-on: http://review.coreboot.org/12053
Reviewed-by: Martin Roth <martinroth@google.com>
Tested-by: build bot (Jenkins)
Diffstat (limited to 'src/northbridge/amd')
| -rw-r--r-- | src/northbridge/amd/amdmct/mct_ddr3/mct_d.c | 19 |
1 files changed, 19 insertions, 0 deletions
diff --git a/src/northbridge/amd/amdmct/mct_ddr3/mct_d.c b/src/northbridge/amd/amdmct/mct_ddr3/mct_d.c index a6cc70f9f5..248fc65eda 100644 --- a/src/northbridge/amd/amdmct/mct_ddr3/mct_d.c +++ b/src/northbridge/amd/amdmct/mct_ddr3/mct_d.c @@ -1502,6 +1502,11 @@ static void set_up_cc6_storage_fam15(struct MCTStatStruc *pMCTstat, if (pMCTstat->GStatus & (1 << GSB_NodeIntlv)) interleaved = 1; + printk(BIOS_INFO, + "%s: Initializing CC6 DRAM storage area for node %d" + " (interleaved: %d)\n", + __func__, pDCTstat->Node_ID, interleaved); + /* Find highest DRAM range (DramLimitAddr) */ max_node = 0; max_range = -1; @@ -1525,6 +1530,13 @@ static void set_up_cc6_storage_fam15(struct MCTStatStruc *pMCTstat, } if (max_range >= 0) { + printk(BIOS_INFO, + "%s:\toriginal (node %d) max_range_limit: %16llx DRAM" + " limit: %16llx\n", + __func__, max_node, max_range_limit, + (((uint64_t)(Get_NB32(pDCTstat->dev_map, 0x124) + & 0x1fffff)) << 27) | 0x7ffffff); + if (interleaved) /* Move upper limit down by 16M * the number of nodes */ max_range_limit -= (0x1000000 * num_nodes); @@ -1532,6 +1544,9 @@ static void set_up_cc6_storage_fam15(struct MCTStatStruc *pMCTstat, /* Move upper limit down by 16M */ max_range_limit -= 0x1000000; + printk(BIOS_INFO, "%s:\tnew max_range_limit: %16llx\n", + __func__, max_range_limit); + /* Disable the range */ dword = Get_NB32(pDCTstat->dev_map, 0x40 + (max_range * 0x8)); byte = dword & 0x3; @@ -1566,6 +1581,10 @@ static void set_up_cc6_storage_fam15(struct MCTStatStruc *pMCTstat, dword &= ~(0x3f << 12); /* CoreSaveStateDestNode = destination_node */ dword |= (destination_node & 0x3f) << 12; Set_NB32(pDCTstat->dev_link, 0x128, dword); + + printk(BIOS_INFO, "%s:\tTarget node: %d\n", __func__, destination_node); + + printk(BIOS_INFO, "%s:\tDone\n", __func__); } static void lock_dram_config(struct MCTStatStruc *pMCTstat, |