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authorZheng Bao <zheng.bao@amd.com>2009-08-24 06:30:37 +0000
committerZheng Bao <Zheng.Bao@amd.com>2009-08-24 06:30:37 +0000
commitbab2bef484f2a6279bb3e7445f72d0c35c7c40fa (patch)
tree66a586fa9c4391711cb7c10c34e8c42e9c5015c2 /src/northbridge/amd
parentebed2dc72056228761e02c5e767f84a1b4187964 (diff)
downloadcoreboot-bab2bef484f2a6279bb3e7445f72d0c35c7c40fa.tar.xz
This patch is about the DA-C2 and RB-C2. Chip with install processor
Revision ID of 0x100F62 is DA-C2, instead of RB-C2 which was incorrectly defined in raminit_amdmct.c. RB-C2's ID is 0x100F42. The Erratas applied to them are almost the same. Issues: 1. I really dont know what their nicknames are (Shanghai C2 or something). 2. About the mc_patch_01000086.h, I dont know if it is allowed to be released. If you really need it, please contact AMD Inc to see if it is public. 3. My RB-C2 is Socket type AM3, which needs DDR3 support. Probably your RB-C2 doesnt need DDR3. If it does and you really need it, please contack AMD Inc to see if it is allowed to release DDR3 code. Signed-off-by: Zheng Bao <zheng.bao@amd.com> Acked-by: Ward Vandewege <ward@gnu.org> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4562 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Diffstat (limited to 'src/northbridge/amd')
-rw-r--r--src/northbridge/amd/amdfam10/raminit_amdmct.c5
-rw-r--r--src/northbridge/amd/amdmct/amddefs.h1
-rw-r--r--src/northbridge/amd/amdmct/wrappers/mcti_d.c2
3 files changed, 6 insertions, 2 deletions
diff --git a/src/northbridge/amd/amdfam10/raminit_amdmct.c b/src/northbridge/amd/amdfam10/raminit_amdmct.c
index 618f344d23..7bd6d4e4e7 100644
--- a/src/northbridge/amd/amdfam10/raminit_amdmct.c
+++ b/src/northbridge/amd/amdfam10/raminit_amdmct.c
@@ -149,9 +149,12 @@ u32 mctGetLogicalCPUID(u32 Node)
case 0x10023:
ret = AMD_DR_B3;
break;
- case 0x10062:
+ case 0x10042:
ret = AMD_RB_C2;
break;
+ case 0x10062:
+ ret = AMD_DA_C2;
+ break;
default:
/* FIXME: mabe we should die() here. */
print_err("FIXME! CPU Version unknown or not supported! \n");
diff --git a/src/northbridge/amd/amdmct/amddefs.h b/src/northbridge/amd/amdmct/amddefs.h
index 5afb0a3c1d..004e4cf50d 100644
--- a/src/northbridge/amd/amdmct/amddefs.h
+++ b/src/northbridge/amd/amdmct/amddefs.h
@@ -41,6 +41,7 @@
#define AMD_DR_BA 0x00400000 /* Barcelona BA */
#define AMD_DR_B3 0x00800000 /* Barcelona B3 */
#define AMD_RB_C2 0x01000000 /* Shanghai C2 */
+#define AMD_DA_C2 0x02000000 /* XXXX C2 */
/*
* Groups - Create as many as you wish, from the above public values
diff --git a/src/northbridge/amd/amdmct/wrappers/mcti_d.c b/src/northbridge/amd/amdmct/wrappers/mcti_d.c
index 1ec8d4ede8..54ee28f8d5 100644
--- a/src/northbridge/amd/amdmct/wrappers/mcti_d.c
+++ b/src/northbridge/amd/amdmct/wrappers/mcti_d.c
@@ -394,7 +394,7 @@ void vErrata350(struct MCTStatStruc *pMCTstat, struct DCTStatStruc *pDCTstat)
void mctHookBeforeAnyTraining(struct MCTStatStruc *pMCTstat, struct DCTStatStruc *pDCTstatA)
{
- if (pDCTstatA->LogicalCPUID & AMD_RB_C2) {
+ if (pDCTstatA->LogicalCPUID & (AMD_RB_C2 | AMD_DA_C2)) {
vErrata350(pMCTstat, pDCTstatA);
}
}