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authorMarc Jones <marc.jones@se-eng.com>2013-01-16 17:14:24 -0700
committerMarc Jones <marcj303@gmail.com>2013-01-22 19:17:35 +0100
commitd5c998be99709c92f200b3b08aed2ca3fee2d519 (patch)
tree1d6be9f8e88de9ba51ff6cf531341dfea4835cec /src/northbridge/amd
parent5e732b8bf0fde8a304758e8845f3100a09037f2b (diff)
downloadcoreboot-d5c998be99709c92f200b3b08aed2ca3fee2d519.tar.xz
Add MMCONF resource to AMD fam14 PCI_DOMAIN.
The coreboot resource allocator doesn't respect resources claimed in the APIC_CLUSTER. Move the MMCONF resource to the PCI_DOMAIN to prevent overlap with PCI devices. Change-Id: I8541795f69bbdd9041b390103fb901d37e07eeb9 Signed-off-by: Marc Jones <marc.jones@se-eng.com> Reviewed-on: http://review.coreboot.org/2167 Reviewed-by: Dave Frodin <dave.frodin@se-eng.com> Tested-by: build bot (Jenkins) Reviewed-by: Martin Roth <martin.roth@se-eng.com> Reviewed-by: Steve Goodrich <steve.goodrich@se-eng.com>
Diffstat (limited to 'src/northbridge/amd')
-rw-r--r--src/northbridge/amd/agesa/family14/northbridge.c42
1 files changed, 23 insertions, 19 deletions
diff --git a/src/northbridge/amd/agesa/family14/northbridge.c b/src/northbridge/amd/agesa/family14/northbridge.c
index 0bbf10c2fd..06bace4038 100644
--- a/src/northbridge/amd/agesa/family14/northbridge.c
+++ b/src/northbridge/amd/agesa/family14/northbridge.c
@@ -343,6 +343,19 @@ static void nb_read_resources(device_t dev)
amdfam14_link_read_bases(dev, nodeid, link->link_num);
}
}
+
+ /*
+ * This MMCONF resource must be reserved in the PCI_DOMAIN.
+ * It is not honored by the coreboot resource allocator if it is in
+ * the APIC_CLUSTER.
+ */
+#if CONFIG_MMCONF_SUPPORT
+ struct resource *resource = new_resource(dev, 0xc0010058);
+ resource->base = CONFIG_MMCONF_BASE_ADDRESS;
+ resource->size = CONFIG_MMCONF_BUS_NUMBER * 4096 * 256;
+ resource->flags = IORESOURCE_MEM | IORESOURCE_RESERVE |
+ IORESOURCE_FIXED | IORESOURCE_STORED | IORESOURCE_ASSIGNED;
+#endif
}
static void set_resource(device_t dev, struct resource *resource, u32 nodeid)
@@ -452,6 +465,12 @@ static void nb_set_resources(device_t dev)
assign_resources(bus);
}
}
+
+ /* Print the MMCONF region if it has been reserved. */
+ res = find_resource(dev, 0xc0010058);
+ if (res) {
+ report_resource_stored(dev, res, " <mmconfig>");
+ }
}
/* Domain/Root Complex related code */
@@ -802,27 +821,12 @@ static void domain_enable_resources(device_t dev)
/* Bus related code */
-static void cpu_bus_read_resources(device_t dev) {
- printk(BIOS_DEBUG, "\nFam14h - cpu_bus_read_resources.\n");
-
-#if CONFIG_MMCONF_SUPPORT
- struct resource *resource = new_resource(dev, 0xc0010058);
- resource->base = CONFIG_MMCONF_BASE_ADDRESS;
- resource->size = CONFIG_MMCONF_BUS_NUMBER * 4096 * 256;
- resource->flags = IORESOURCE_MEM | IORESOURCE_RESERVE |
- IORESOURCE_FIXED | IORESOURCE_STORED | IORESOURCE_ASSIGNED;
-#endif
+static void cpu_bus_read_resources(device_t dev)
+{
}
-static void cpu_bus_set_resources(device_t dev) {
- struct resource *resource = find_resource(dev, 0xc0010058);
-
- printk(BIOS_DEBUG, "\nFam14h - cpu_bus_set_resources.\n");
-
- if (resource) {
- report_resource_stored(dev, resource, " <mmconfig>");
- }
- pci_dev_set_resources(dev);
+static void cpu_bus_set_resources(device_t dev)
+{
}
static u32 cpu_bus_scan(device_t dev, u32 max)