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| author | Wim Vervoorn <wvervoorn@eltan.com> | 2019-11-07 15:57:25 +0100 |
|---|---|---|
| committer | Patrick Georgi <pgeorgi@google.com> | 2019-11-15 16:41:13 +0000 |
| commit | dc7b2de88bb56d3284c3ab6227cffefd8c76836b (patch) | |
| tree | a1d345a2afd09ce2c9a16936bbb7e57c3e7c5486 /src/northbridge/amd | |
| parent | bd3ac9c0b0d25dc365238be37d33af1f5c0f6525 (diff) | |
| download | coreboot-dc7b2de88bb56d3284c3ab6227cffefd8c76836b.tar.xz | |
soc/intel/skylake/acpi/dptf: Disable DTRP when no DPTF_TSRX_SENSOR_ID is defined
On mainboards without DPTF_TSRX_SENSOR_ID method DTRP is never called
Only add the DTRP method when at least one sensor is enabled.
BUG=N/A
TEST=build
Change-Id: I4fb26d5bbb7b334e759e7073b680f830f412467e
Signed-off-by: Wim Vervoorn <wvervoorn@eltan.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/36856
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/northbridge/amd')
0 files changed, 0 insertions, 0 deletions