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authorYinghai Lu <yinghailu@gmail.com>2005-01-03 20:00:36 +0000
committerYinghai Lu <yinghailu@gmail.com>2005-01-03 20:00:36 +0000
commite089f00ad494ffbb91f605b09b59375ff4eb30b3 (patch)
tree95863d814a101141714654cd3d2dc1805424b48a /src/northbridge/amd
parentbf0ed605149af3560dcc5e6c014c4acb70b9a831 (diff)
downloadcoreboot-e089f00ad494ffbb91f605b09b59375ff4eb30b3.tar.xz
optimize read link bug fixed.
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1836 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Diffstat (limited to 'src/northbridge/amd')
-rw-r--r--src/northbridge/amd/amdk8/misc_control.c4
1 files changed, 2 insertions, 2 deletions
diff --git a/src/northbridge/amd/amdk8/misc_control.c b/src/northbridge/amd/amdk8/misc_control.c
index e5e8f4c78f..379d8b1dc4 100644
--- a/src/northbridge/amd/amdk8/misc_control.c
+++ b/src/northbridge/amd/amdk8/misc_control.c
@@ -187,8 +187,8 @@ static void misc_control_init(struct device *dev)
/* This works on an Athlon64 because unimplemented links return 0 */
reg = 0x98 + (link * 0x20);
link_type = pci_read_config32(f0_dev, reg);
- if (link_type & LinkConnected) {
- cmd &= 0xff << (link *8);
+ if ((link_type & 7) == 3) { /* only handle coherent link here please */
+ cmd &= ~(0xff << (link *8));
/* FIXME this assumes the device on the other side is an AMD device */
cmd |= 0x25 << (link *8);
}