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authorYinghai Lu <yinghailu@gmail.com>2005-01-19 18:09:58 +0000
committerYinghai Lu <yinghailu@gmail.com>2005-01-19 18:09:58 +0000
commit3d606885166b5425ef648521fe7947fb7b608802 (patch)
treeb95bd9806d344820aea8576ae164c5bb726e0d26 /src/northbridge/amd
parentd06b7831866b8ff315e483eeff1b8bd5f93bab69 (diff)
downloadcoreboot-3d606885166b5425ef648521fe7947fb7b608802.tar.xz
linkb_to_host
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1890 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Diffstat (limited to 'src/northbridge/amd')
-rw-r--r--src/northbridge/amd/amdk8/incoherent_ht.c2
1 files changed, 1 insertions, 1 deletions
diff --git a/src/northbridge/amd/amdk8/incoherent_ht.c b/src/northbridge/amd/amdk8/incoherent_ht.c
index f5cd5aa70f..16b82a7262 100644
--- a/src/northbridge/amd/amdk8/incoherent_ht.c
+++ b/src/northbridge/amd/amdk8/incoherent_ht.c
@@ -299,7 +299,7 @@ static int ht_setup_chainx(device_t udev, uint8_t upos, uint8_t bus)
}
/* get ht direction */
- offs = (pci_read_config16(dev, pos + PCI_CAP_FLAGS) & (1<<10)) ? PCI_HT_SLAVE1_OFFS : PCI_HT_SLAVE0_OFFS;
+ offs = ((pci_read_config16(dev, pos + PCI_CAP_FLAGS)>>10) & 1) ? PCI_HT_SLAVE1_OFFS : PCI_HT_SLAVE0_OFFS;
/* Setup the Hypertransport link */
reset_needed |= ht_optimize_link(udev, upos, uoffs, dev, pos, offs);