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authorLi-Ta Lo <ollie@lanl.gov>2006-04-06 20:19:04 +0000
committerLi-Ta Lo <ollie@lanl.gov>2006-04-06 20:19:04 +0000
commit5917c62749b9cdb60e54bb409bf74fe50e414aa7 (patch)
tree726a66318a6528ecee511ce5f9dd9eb0484b5000 /src/northbridge/amd
parent8854d30d6edb0e4e7f73cd2ab72b7cec78556846 (diff)
downloadcoreboot-5917c62749b9cdb60e54bb409bf74fe50e414aa7.tar.xz
more fix for vsm, not working yet
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2237 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Diffstat (limited to 'src/northbridge/amd')
-rw-r--r--src/northbridge/amd/gx2/northbridge.c23
1 files changed, 22 insertions, 1 deletions
diff --git a/src/northbridge/amd/gx2/northbridge.c b/src/northbridge/amd/gx2/northbridge.c
index fb3cb1c1e0..85c38229aa 100644
--- a/src/northbridge/amd/gx2/northbridge.c
+++ b/src/northbridge/amd/gx2/northbridge.c
@@ -171,7 +171,7 @@ setup_gx2(void)
sizem = setup_gx2_cache();
membytes = sizem * 1048576;
-
+#if 0
/* we need to set 0x10000028 and 0x40000029 */
printk_debug("sizem 0x%x, membytes 0x%x\n", sizem, membytes);
msr.hi = 0x20000000 | membytes>>24;
@@ -201,7 +201,28 @@ setup_gx2(void)
msr.hi = tmp;
msr.lo = tmp2;
wrmsr(0x10000026, msr);
+#else
+ msr.hi = 0x2000000f;
+ msr.lo = 0xfbf00100;
+ wrmsr(0x10000028, msr);
+ msr = rdmsr(0x10000028);
+ printk_debug("MSR 0x%x is now 0x%x:0x%x\n", 0x10000028, msr.hi, msr.lo);
+ wrmsr(0x40000029, msr);
+ msr = rdmsr(0x40000029);
+ printk_debug("MSR 0x%x is now 0x%x:0x%x\n", 0x40000029, msr.hi, msr.lo);
+ msr.hi = 0x2cfbc040;
+ msr.lo = 0x400fffc0;
+ wrmsr(0x10000026, msr);
+ msr = rdmsr(0x10000026);
+ printk_debug("MSR 0x%x is now 0x%x:0x%x\n", 0x10000026, msr.hi, msr.lo);
+
+ msr.hi = 0x22fffc02;
+ msr.lo = 0x10ffbf00;
+ wrmsr(0x1808, msr);
+ msr = rdmsr(0x1808);
+ printk_debug("MSR 0x%x is now 0x%x:0x%x\n", 0x1808, msr.hi, msr.lo);
+#endif
/* now do the default MSR values */
for(i = 0; msr_defaults[i].msr_no; i++) {
msr_t msr;