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author | Fabian Kunkel <fabi@adv.bruhnspace.com> | 2015-05-25 17:16:02 +0200 |
---|---|---|
committer | Kyösti Mälkki <kyosti.malkki@gmail.com> | 2015-05-26 15:05:38 +0200 |
commit | 647456c18ad969a0f3ddcdefaf3c9d4ea313bb20 (patch) | |
tree | d80ab2b9443d79a621b32fbe23c023fa92bf471a /src/northbridge/amd | |
parent | 8ac29e89b6c1614d9eee3dfee3ea5977f6d0e4a9 (diff) | |
download | coreboot-647456c18ad969a0f3ddcdefaf3c9d4ea313bb20.tar.xz |
AGESA f16kb: Fix PCI device notation
Old file defines wrong PCI devices (1.2 2.2 3.2 4.2 5.2).
Wrong defines cause PCI devices not to be found in the pirq_data table.
Example error output:
PCI IRQ: Found device 0:02.01 using PIN A
PCI Devfn (0x11) not found in pirq_data table
PCI IRQ: Found device 0:02.02 using PIN B
Found this device in pirq_data table entry 3
Orig INT_PIN : 2 (PIN B)
PCI_INTR idx : 0x02 (INTC# )
INT_LINE : 0xA (IRQ 10)
PCI IRQ: Found device 0:02.03 using PIN C
PCI Devfn (0x13) not found in pirq_data table
PCI IRQ: Found device 0:02.04 using PIN D
PCI Devfn (0x14) not found in pirq_data table
PCI IRQ: Found device 0:02.05 using PIN A
PCI Devfn (0x15) not found in pirq_data table
Patch fixes, that pirq_data entries for pci devices 2.1 - 2.5 get found.
Change-Id: I4503433427f4ec90d022b65084c52077ba4f3511
Signed-off-by: Fabian Kunkel <fabi@adv.bruhnspace.com>
Reviewed-on: http://review.coreboot.org/10289
Tested-by: build bot (Jenkins)
Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-by: Dave Frodin <dave.frodin@se-eng.com>
Diffstat (limited to 'src/northbridge/amd')
-rw-r--r-- | src/northbridge/amd/agesa/family16kb/pci_devs.h | 22 |
1 files changed, 11 insertions, 11 deletions
diff --git a/src/northbridge/amd/agesa/family16kb/pci_devs.h b/src/northbridge/amd/agesa/family16kb/pci_devs.h index 28e3c68b2f..9642a2a01b 100644 --- a/src/northbridge/amd/agesa/family16kb/pci_devs.h +++ b/src/northbridge/amd/agesa/family16kb/pci_devs.h @@ -32,17 +32,17 @@ #define ACTL_DEVFN PCI_DEVFN(GFX_DEV,ACTL_FUNC) /* PCIe Ports */ -#define NB_PCIE_PORT1_DEV 0x1 -#define NB_PCIE_PORT2_DEV 0x2 -#define NB_PCIE_PORT3_DEV 0x3 -#define NB_PCIE_PORT4_DEV 0x4 -#define NB_PCIE_PORT5_DEV 0x5 -#define NB_PCIE_FUNC 2 +#define NB_PCIE_PORT1_FUNC 0x1 +#define NB_PCIE_PORT2_FUNC 0x2 +#define NB_PCIE_PORT3_FUNC 0x3 +#define NB_PCIE_PORT4_FUNC 0x4 +#define NB_PCIE_PORT5_FUNC 0x5 +#define NB_PCIE_DEV 2 #define NB_PCIE_PORT_DEVID 0x1439 -#define NB_PCIE_PORT1_DEVFN PCI_DEVFN(NB_PCIE_PORT1_DEV,NB_PCIE_FUNC) -#define NB_PCIE_PORT2_DEVFN PCI_DEVFN(NB_PCIE_PORT2_DEV,NB_PCIE_FUNC) -#define NB_PCIE_PORT3_DEVFN PCI_DEVFN(NB_PCIE_PORT3_DEV,NB_PCIE_FUNC) -#define NB_PCIE_PORT4_DEVFN PCI_DEVFN(NB_PCIE_PORT4_DEV,NB_PCIE_FUNC) -#define NB_PCIE_PORT5_DEVFN PCI_DEVFN(NB_PCIE_PORT5_DEV,NB_PCIE_FUNC) +#define NB_PCIE_PORT1_DEVFN PCI_DEVFN(NB_PCIE_DEV,NB_PCIE_PORT1_FUNC) +#define NB_PCIE_PORT2_DEVFN PCI_DEVFN(NB_PCIE_DEV,NB_PCIE_PORT2_FUNC) +#define NB_PCIE_PORT3_DEVFN PCI_DEVFN(NB_PCIE_DEV,NB_PCIE_PORT3_FUNC) +#define NB_PCIE_PORT4_DEVFN PCI_DEVFN(NB_PCIE_DEV,NB_PCIE_PORT4_FUNC) +#define NB_PCIE_PORT5_DEVFN PCI_DEVFN(NB_PCIE_DEV,NB_PCIE_PORT5_FUNC) #endif /* _AMD_FAM16KB_PCI_DEVS_H_ */ |