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| author | Kyösti Mälkki <kyosti.malkki@gmail.com> | 2012-07-11 08:03:13 +0300 |
|---|---|---|
| committer | Patrick Georgi <patrick@georgi-clan.de> | 2012-07-16 18:46:33 +0200 |
| commit | ba589e3630b0e3259b1f3d54434589e76ec48398 (patch) | |
| tree | ffafff40f2f663cf70a10624bb42c2a2aae80b90 /src/northbridge/amd | |
| parent | 231f2614021967c9645d9e5b83dbea2089600be3 (diff) | |
| download | coreboot-ba589e3630b0e3259b1f3d54434589e76ec48398.tar.xz | |
Move setup_uma_memory() to K8 northbridge
These boards had identical UMA code:
amd/dbm690t
amd/pistachio
technexion/tim5690
technexion/tim8690
The ones below had whitespace or debug level change
compared to the one above:
kontron/kt690
siemens/sitemp_g1p1
These boards use AMDFAM10 guidelines in code:
asrock/939a785gmh
amd/mahogany
Change-Id: Id7c3f48035727f5847f2d7c3a6e87a3d15582003
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: http://review.coreboot.org/1210
Tested-by: build bot (Jenkins)
Reviewed-by: Patrick Georgi <patrick@georgi-clan.de>
Diffstat (limited to 'src/northbridge/amd')
| -rw-r--r-- | src/northbridge/amd/amdk8/northbridge.c | 63 |
1 files changed, 63 insertions, 0 deletions
diff --git a/src/northbridge/amd/amdk8/northbridge.c b/src/northbridge/amd/amdk8/northbridge.c index 8b9140dd5f..a7aa19dc42 100644 --- a/src/northbridge/amd/amdk8/northbridge.c +++ b/src/northbridge/amd/amdk8/northbridge.c @@ -18,6 +18,7 @@ #include <cpu/cpu.h> #include <cpu/x86/lapic.h> +#include <cpu/amd/mtrr.h> #include <cpu/amd/multicore.h> #if CONFIG_LOGICAL_CPUS @@ -822,6 +823,68 @@ static u32 hoist_memory(unsigned long hole_startk, int node_id) #include <cbmem.h> #endif +void setup_uma_memory(void) +{ +#if CONFIG_GFXUMA + msr_t msr, msr2; + + /* TOP_MEM: the top of DRAM below 4G */ + msr = rdmsr(TOP_MEM); + printk(BIOS_INFO, "%s, TOP MEM: msr.lo = 0x%08x, msr.hi = 0x%08x\n", + __func__, msr.lo, msr.hi); + + /* TOP_MEM2: the top of DRAM above 4G */ + msr2 = rdmsr(TOP_MEM2); + printk(BIOS_INFO, "%s, TOP MEM2: msr.lo = 0x%08x, msr.hi = 0x%08x\n", + __func__, msr2.lo, msr2.hi); + +#if !CONFIG_BOARD_ASROCK_939A785GMH && !CONFIG_BOARD_AMD_MAHOGANY + + switch (msr.lo) { + case 0x10000000: /* 256M system memory */ + uma_memory_size = 0x2000000; /* 32M recommended UMA */ + break; + + case 0x18000000: /* 384M system memory */ + uma_memory_size = 0x4000000; /* 64M recommended UMA */ + break; + + case 0x20000000: /* 512M system memory */ + uma_memory_size = 0x4000000; /* 64M recommended UMA */ + break; + + default: /* 1GB and above system memory */ + uma_memory_size = 0x8000000; /* 128M recommended UMA */ + break; + } +#else + /* refer to UMA Size Consideration in 780 BDG. */ + switch (msr.lo) { + case 0x10000000: /* 256M system memory */ + uma_memory_size = 0x4000000; /* 64M recommended UMA */ + break; + + case 0x20000000: /* 512M system memory */ + uma_memory_size = 0x8000000; /* 128M recommended UMA */ + break; + + default: /* 1GB and above system memory */ + uma_memory_size = 0x10000000; /* 256M recommended UMA */ + break; + } +#endif + + uma_memory_base = msr.lo - uma_memory_size; /* TOP_MEM1 */ + printk(BIOS_INFO, "%s: uma size 0x%08llx, memory start 0x%08llx\n", + __func__, uma_memory_size, uma_memory_base); + + /* TODO: TOP_MEM2 */ +#else + uma_memory_size = 0x8000000; /* 128M recommended UMA */ + uma_memory_base = 0x38000000; /* 1GB system memory supposed */ +#endif +} + static void amdk8_domain_set_resources(device_t dev) { #if CONFIG_PCI_64BIT_PREF_MEM |