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authorZheng Bao <zheng.bao@amd.com>2010-09-21 02:51:31 +0000
committerZheng Bao <Zheng.Bao@amd.com>2010-09-21 02:51:31 +0000
commit0c51ddd98b6355e4f070ff13766cd1e75b77037c (patch)
tree5434c8ab553048a6e059650ba10f5025482d64a4 /src/northbridge/amd
parent951a0feb2d5b2c68c1a15c192333578c6769e99e (diff)
downloadcoreboot-0c51ddd98b6355e4f070ff13766cd1e75b77037c.tar.xz
Complete the code which was missing.
Signed-off-by: Zheng Bao <zheng.bao@amd.com> Acked-by: Peter Stuge <peter@stuge.se> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5822 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Diffstat (limited to 'src/northbridge/amd')
-rw-r--r--src/northbridge/amd/amdmct/mct/mct_d.c3
1 files changed, 3 insertions, 0 deletions
diff --git a/src/northbridge/amd/amdmct/mct/mct_d.c b/src/northbridge/amd/amdmct/mct/mct_d.c
index 4233705241..402b5d93a5 100644
--- a/src/northbridge/amd/amdmct/mct/mct_d.c
+++ b/src/northbridge/amd/amdmct/mct/mct_d.c
@@ -2426,8 +2426,11 @@ static void mct_DramInit(struct MCTStatStruc *pMCTstat,
val = Get_NB32(pDCTstat->dev_dct, 0x8C + (0x100 * dct));
val &= ~(1 << DisAutoRefresh);
+ Set_NB32(pDCTstat->dev_dct, 0x8C + (0x100 * dct), val);
val |= 1 << DisAutoRefresh;
+ Set_NB32(pDCTstat->dev_dct, 0x8C + (0x100 * dct), val);
val &= ~(1 << DisAutoRefresh);
+ Set_NB32(pDCTstat->dev_dct, 0x8C + (0x100 * dct), val);
}
}
}