fix AMD Solo target

git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1300 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1

1 files changed, 13 insertions, 1 deletions

diff --git a/src/northbridge/amd/amdk8/misc_control.c b/src/northbridge/amd/amdk8/misc_control.c
index 045f5cef06..9d4e968267 100644
--- a/src/northbridge/amd/amdk8/misc_control.c
+++ b/src/northbridge/amd/amdk8/misc_control.c
@@ -50,7 +50,19 @@ static void misc_control_init(struct device *dev)
 		cmd = 0x04e20707;
 		pci_write_config32(dev, 0xd4, cmd );
 	}
-#if 1	
+
+/*
+ * FIXME: This preprocessor check is a mere workaround. 
+ * The right fix is to walk over all links on all nodes
+ * and set the FIFO read pointer optimization value to
+ * 0x25 for each link connected to an AMD HT device.
+ *
+ * The reason this is only enabled for machines with more 
+ * than one CPU is that Athlon64 machines don't have the
+ * link at all that is optimized in the code.
+ */
+
+#if CONFIG_MAX_CPUS > 1	
 	cmd = pci_read_config32(dev, 0xdc);
 	if((cmd & 0x0000ff00) != 0x02500) {
 		cmd &= 0xffff00ff;