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| author | Elyes HAOUAS <ehaouas@noos.fr> | 2020-01-07 19:53:36 +0100 |
|---|---|---|
| committer | Kyösti Mälkki <kyosti.malkki@gmail.com> | 2020-01-08 12:58:31 +0000 |
| commit | 38a4f2a9740c0a61b1c89525950bc8bd4febb22c (patch) | |
| tree | b8f16e4607f0c666bfb679a73f61017b07738c3c /src/northbridge/amd | |
| parent | 0bc9f0b82706c1a35baabf6fe21d4e705820dc97 (diff) | |
| download | coreboot-38a4f2a9740c0a61b1c89525950bc8bd4febb22c.tar.xz | |
nb/amd/pi: Fix typos
Change-Id: I79ec3a346edde0a63cf344352e58dfb78556dfd8
Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/38244
Reviewed-by: Michał Żygowski <michal.zygowski@3mdeb.com>
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/northbridge/amd')
| -rw-r--r-- | src/northbridge/amd/pi/00630F01/northbridge.c | 2 | ||||
| -rw-r--r-- | src/northbridge/amd/pi/00660F01/northbridge.c | 4 | ||||
| -rw-r--r-- | src/northbridge/amd/pi/00730F01/northbridge.c | 4 |
3 files changed, 5 insertions, 5 deletions
diff --git a/src/northbridge/amd/pi/00630F01/northbridge.c b/src/northbridge/amd/pi/00630F01/northbridge.c index b55b23c702..2295cd6abc 100644 --- a/src/northbridge/amd/pi/00630F01/northbridge.c +++ b/src/northbridge/amd/pi/00630F01/northbridge.c @@ -860,7 +860,7 @@ static void cpu_bus_scan(struct device *dev) u32 lapicid_start = 0; /* - * APIC ID calucation is tightly coupled with AGESA v5 code. + * APIC ID calculation is tightly coupled with AGESA v5 code. * This calculation MUST match the assignment calculation done * in LocalApicInitializationAtEarly() function. * And reference GetLocalApicIdForCore() diff --git a/src/northbridge/amd/pi/00660F01/northbridge.c b/src/northbridge/amd/pi/00660F01/northbridge.c index 7dc338ef5d..16b5734a49 100644 --- a/src/northbridge/amd/pi/00660F01/northbridge.c +++ b/src/northbridge/amd/pi/00660F01/northbridge.c @@ -645,7 +645,7 @@ static struct hw_mem_hole_info get_hw_mem_hole_info(void) base_k = ((resource_t)(d.base & 0x1fffff00)) <<9; if (base_k > 4 *1024 * 1024) break; // don't need to go to check if (limitk_pri != base_k) { // we find the hole - mem_hole.hole_startk = (unsigned int)limitk_pri; // must beblow 4G + mem_hole.hole_startk = (unsigned int)limitk_pri; // must be below 4G mem_hole.node_id = i; break; //only one hole } @@ -858,7 +858,7 @@ static void cpu_bus_scan(struct device *dev) u32 lapicid_start = 0; /* - * APIC ID calucation is tightly coupled with AGESA v5 code. + * APIC ID calculation is tightly coupled with AGESA v5 code. * This calculation MUST match the assignment calculation done * in LocalApicInitializationAtEarly() function. * And reference GetLocalApicIdForCore() diff --git a/src/northbridge/amd/pi/00730F01/northbridge.c b/src/northbridge/amd/pi/00730F01/northbridge.c index 8da3f0af91..e5a75e8b80 100644 --- a/src/northbridge/amd/pi/00730F01/northbridge.c +++ b/src/northbridge/amd/pi/00730F01/northbridge.c @@ -869,7 +869,7 @@ static struct hw_mem_hole_info get_hw_mem_hole_info(void) base_k = ((resource_t)(d.base & 0x1fffff00)) <<9; if (base_k > 4 *1024 * 1024) break; // don't need to go to check if (limitk_pri != base_k) { // we find the hole - mem_hole.hole_startk = (unsigned int)limitk_pri; // must beblow 4G + mem_hole.hole_startk = (unsigned int)limitk_pri; // must be below 4G mem_hole.node_id = i; break; //only one hole } @@ -1097,7 +1097,7 @@ static void cpu_bus_scan(struct device *dev) u32 lapicid_start = 0; /* - * APIC ID calucation is tightly coupled with AGESA v5 code. + * APIC ID calculation is tightly coupled with AGESA v5 code. * This calculation MUST match the assignment calculation done * in LocalApicInitializationAtEarly() function. * And reference GetLocalApicIdForCore() |