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| author | Timothy Pearson <tpearson@raptorengineeringinc.com> | 2015-08-14 16:31:14 -0500 |
|---|---|---|
| committer | Stefan Reinauer <stefan.reinauer@coreboot.org> | 2015-08-18 21:37:18 +0000 |
| commit | 5cac25e6b2331a559394a3e3f636c4a6a80c58ac (patch) | |
| tree | d236bd29ef18ef8eb93e46dd9ca55b0fb7d39015 /src/northbridge/amd | |
| parent | b95fc308af04d06a384cac2972a23dc5e6dbefaf (diff) | |
| download | coreboot-5cac25e6b2331a559394a3e3f636c4a6a80c58ac.tar.xz | |
northbridge/amd/amdfam10: Redirect legacy VGA memory access to MMIO
Commit 27baa32 (cpu/amd/model_10xxx: Do not initialize SMM memory if
SMM is disabled) deactivated TSeg SMRAM, which had the side effect
of routing legacy VGA memory access to DRAM. Restore the correct
MMIO mapping via the MMIO configuration registers.
TEST: Booted KGPE-D16 with nVidia 7300LE card and verified proper VGA
functionality.
Change-Id: Ie4b7c0b2d6f9a02af9a022565fe514119513190a
Signed-off-by: Timothy Pearson <tpearson@raptorengineeringinc.com>
Reviewed-on: http://review.coreboot.org/11240
Tested-by: build bot (Jenkins)
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Diffstat (limited to 'src/northbridge/amd')
| -rw-r--r-- | src/northbridge/amd/amdfam10/northbridge.c | 13 |
1 files changed, 13 insertions, 0 deletions
diff --git a/src/northbridge/amd/amdfam10/northbridge.c b/src/northbridge/amd/amdfam10/northbridge.c index f6f2641135..6d91cbd00d 100644 --- a/src/northbridge/amd/amdfam10/northbridge.c +++ b/src/northbridge/amd/amdfam10/northbridge.c @@ -492,6 +492,7 @@ static void amdfam10_set_resource(device_t dev, struct resource *resource, static void amdfam10_create_vga_resource(device_t dev, unsigned nodeid) { struct bus *link; + struct resource *res; /* find out which link the VGA card is connected, * we only deal with the 'first' vga card */ @@ -516,6 +517,18 @@ static void amdfam10_create_vga_resource(device_t dev, unsigned nodeid) printk(BIOS_DEBUG, "VGA: %s (aka node %d) link %d has VGA device\n", dev_path(dev), nodeid, link->link_num); set_vga_enable_reg(nodeid, link->link_num); + + /* Redirect VGA memory access to MMIO + * This signals the Family 10h resource parser + * to add a new MMIO mapping to the Range 11 + * MMIO control registers (starting at F1x1B8), + * and also reserves the resource in the E820 map. + */ + res = new_resource(dev, IOINDEX(0x1000 + 0x1b8, link->link_num)); + res->base = 0xa0000; + res->size = 0x20000; + res->flags = IORESOURCE_MEM | IORESOURCE_ASSIGNED | IORESOURCE_FIXED; + amdfam10_set_resource(dev, res, nodeid); } static void amdfam10_set_resources(device_t dev) |