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authorArne Georg Gleditsch <arne.gleditsch@numscale.com>2010-09-09 10:35:52 +0000
committerPatrick Georgi <patrick.georgi@coresystems.de>2010-09-09 10:35:52 +0000
commite150e9a5717235878e491157721966f446d6c66b (patch)
treea3d3c634768b07c0d283772f53c7aed1dc231b38 /src/northbridge/amd
parent6556534bab10fdd485f3c803321751b6eb9626ce (diff)
downloadcoreboot-e150e9a5717235878e491157721966f446d6c66b.tar.xz
Also improve boot time on AMD for the DDR3 code path.
Fix a typo, too. Signed-off-by: Arne Georg Gleditsch <arne.gleditsch@numscale.com> Acked-by: Patrick Georgi <patrick.georgi@coresystems.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5792 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Diffstat (limited to 'src/northbridge/amd')
-rw-r--r--src/northbridge/amd/amdmct/mct/mct_d.c2
-rw-r--r--src/northbridge/amd/amdmct/mct_ddr3/mct_d.c2
2 files changed, 2 insertions, 2 deletions
diff --git a/src/northbridge/amd/amdmct/mct/mct_d.c b/src/northbridge/amd/amdmct/mct/mct_d.c
index c571b2349d..5043b754b7 100644
--- a/src/northbridge/amd/amdmct/mct/mct_d.c
+++ b/src/northbridge/amd/amdmct/mct/mct_d.c
@@ -3189,7 +3189,7 @@ static void mct_FinalMCT_D(struct MCTStatStruc *pMCTstat,
print_t("\tmct_FinalMCT_D: Clr Cl, Wb\n");
- /* ClrClToNB_D postponed til we're done executing from ROM */
+ /* ClrClToNB_D postponed until we're done executing from ROM */
mct_ClrWbEnhWsbDis_D(pMCTstat, pDCTstat);
}
diff --git a/src/northbridge/amd/amdmct/mct_ddr3/mct_d.c b/src/northbridge/amd/amdmct/mct_ddr3/mct_d.c
index 6eea6e4722..b6782bc007 100644
--- a/src/northbridge/amd/amdmct/mct_ddr3/mct_d.c
+++ b/src/northbridge/amd/amdmct/mct_ddr3/mct_d.c
@@ -2873,7 +2873,7 @@ static u16 Get_WrDatGross_MaxMin(struct DCTStatStruc *pDCTstat,
static void mct_FinalMCT_D(struct MCTStatStruc *pMCTstat,
struct DCTStatStruc *pDCTstat)
{
- mct_ClrClToNB_D(pMCTstat, pDCTstat);
+ /* ClrClToNB_D postponed until we're done executing from ROM */
mct_ClrWbEnhWsbDis_D(pMCTstat, pDCTstat);
}