diff options
author | Kyösti Mälkki <kyosti.malkki@gmail.com> | 2016-12-02 08:56:05 +0200 |
---|---|---|
committer | Kyösti Mälkki <kyosti.malkki@gmail.com> | 2016-12-07 13:00:56 +0100 |
commit | e25b5ef39fd10e48e87e0c4770a721a786e36a36 (patch) | |
tree | 113c2b4eba9bf7fddd6badbafc3c0f6ac0cef04f /src/northbridge/amd | |
parent | 3d15e10aef5811e8c7146e5defb0e36b848547ed (diff) | |
download | coreboot-e25b5ef39fd10e48e87e0c4770a721a786e36a36.tar.xz |
MMCONF_SUPPORT: Consolidate resource registration
Change-Id: Id727270bff9e0288747d178c00f3d747fe223b0f
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: https://review.coreboot.org/17695
Tested-by: build bot (Jenkins)
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Diffstat (limited to 'src/northbridge/amd')
-rw-r--r-- | src/northbridge/amd/agesa/family10/northbridge.c | 21 | ||||
-rw-r--r-- | src/northbridge/amd/agesa/family12/northbridge.c | 13 | ||||
-rw-r--r-- | src/northbridge/amd/agesa/family14/northbridge.c | 6 | ||||
-rw-r--r-- | src/northbridge/amd/agesa/family15/northbridge.c | 6 | ||||
-rw-r--r-- | src/northbridge/amd/agesa/family15rl/northbridge.c | 6 | ||||
-rw-r--r-- | src/northbridge/amd/agesa/family15tn/northbridge.c | 6 | ||||
-rw-r--r-- | src/northbridge/amd/agesa/family16kb/northbridge.c | 6 | ||||
-rw-r--r-- | src/northbridge/amd/amdfam10/northbridge.c | 9 | ||||
-rw-r--r-- | src/northbridge/amd/pi/00630F01/northbridge.c | 11 | ||||
-rw-r--r-- | src/northbridge/amd/pi/00660F01/northbridge.c | 11 | ||||
-rw-r--r-- | src/northbridge/amd/pi/00670F00/northbridge.c | 11 | ||||
-rw-r--r-- | src/northbridge/amd/pi/00730F01/northbridge.c | 11 |
12 files changed, 30 insertions, 87 deletions
diff --git a/src/northbridge/amd/agesa/family10/northbridge.c b/src/northbridge/amd/agesa/family10/northbridge.c index 2a54892575..00799a55d8 100644 --- a/src/northbridge/amd/agesa/family10/northbridge.c +++ b/src/northbridge/amd/agesa/family10/northbridge.c @@ -424,6 +424,13 @@ static void amdfam10_read_resources(device_t dev) amdfam10_link_read_bases(dev, nodeid, link->link_num); } } + + /* + * This MMCONF resource must be reserved in the PCI domain. + * It is not honored by the coreboot resource allocator if it is in + * the CPU_CLUSTER. + */ + mmconf_resource(dev, 0xc0010058); } static void amdfam10_set_resource(device_t dev, struct resource *resource, @@ -530,6 +537,11 @@ static void amdfam10_set_resources(device_t dev) assign_resources(bus); } } + + res = find_resource(dev, 0xc0010058); + if (res) { + report_resource_stored(dev, res, " <mmconfig>"); + } } static void mcf0_control_init(struct device *dev) @@ -1096,19 +1108,10 @@ static void cpu_bus_init(device_t dev) static void cpu_bus_read_resources(device_t dev) { - struct resource *resource = new_resource(dev, 0xc0010058); - resource->base = CONFIG_MMCONF_BASE_ADDRESS; - resource->size = CONFIG_MMCONF_BUS_NUMBER * 4096*256; - resource->flags = IORESOURCE_MEM | IORESOURCE_RESERVE | - IORESOURCE_FIXED | IORESOURCE_STORED | IORESOURCE_ASSIGNED; } static void cpu_bus_set_resources(device_t dev) { - struct resource *resource = find_resource(dev, 0xc0010058); - if (resource) { - report_resource_stored(dev, resource, " <mmconfig>"); - } pci_dev_set_resources(dev); } diff --git a/src/northbridge/amd/agesa/family12/northbridge.c b/src/northbridge/amd/agesa/family12/northbridge.c index 6f2896aa5a..e7363f6669 100644 --- a/src/northbridge/amd/agesa/family12/northbridge.c +++ b/src/northbridge/amd/agesa/family12/northbridge.c @@ -300,6 +300,14 @@ static void read_resources(device_t dev) amdfam12_link_read_bases(dev, nodeid, link->link_num); } } + + /* + * This MMCONF resource must be reserved in the PCI domain. + * It is not honored by the coreboot resource allocator if it is in + * the CPU_CLUSTER. + */ + mmconf_resource(dev, 0xc0010058); + printk(BIOS_DEBUG, "Fam12h - northbridge.c - %s - End.\n",__func__); } @@ -649,11 +657,6 @@ static void cpu_bus_read_resources(device_t dev) { printk(BIOS_DEBUG, "\nFam12h - northbridge.c - %s - Start.\n",__func__); - struct resource *resource = new_resource(dev, 0xc0010058); - resource->base = CONFIG_MMCONF_BASE_ADDRESS; - resource->size = CONFIG_MMCONF_BUS_NUMBER * 4096*256; - resource->flags = IORESOURCE_MEM | IORESOURCE_RESERVE | - IORESOURCE_FIXED | IORESOURCE_STORED | IORESOURCE_ASSIGNED; printk(BIOS_DEBUG, "Fam12h - northbridge.c - %s - End.\n",__func__); } diff --git a/src/northbridge/amd/agesa/family14/northbridge.c b/src/northbridge/amd/agesa/family14/northbridge.c index f92183e8d5..d66e83a0b5 100644 --- a/src/northbridge/amd/agesa/family14/northbridge.c +++ b/src/northbridge/amd/agesa/family14/northbridge.c @@ -302,11 +302,7 @@ static void nb_read_resources(device_t dev) * It is not honored by the coreboot resource allocator if it is in * the CPU_CLUSTER. */ - struct resource *resource = new_resource(dev, 0xc0010058); - resource->base = CONFIG_MMCONF_BASE_ADDRESS; - resource->size = CONFIG_MMCONF_BUS_NUMBER * 4096 * 256; - resource->flags = IORESOURCE_MEM | IORESOURCE_RESERVE | - IORESOURCE_FIXED | IORESOURCE_STORED | IORESOURCE_ASSIGNED; + mmconf_resource(dev, 0xc0010058); } static void set_resource(device_t dev, struct resource *resource, u32 nodeid) diff --git a/src/northbridge/amd/agesa/family15/northbridge.c b/src/northbridge/amd/agesa/family15/northbridge.c index 5fc9833445..77ac720bb1 100644 --- a/src/northbridge/amd/agesa/family15/northbridge.c +++ b/src/northbridge/amd/agesa/family15/northbridge.c @@ -326,11 +326,7 @@ static void nb_read_resources(device_t dev) * It is not honored by the coreboot resource allocator if it is in * the CPU_CLUSTER. */ - struct resource *resource = new_resource(dev, 0xc0010058); - resource->base = CONFIG_MMCONF_BASE_ADDRESS; - resource->size = CONFIG_MMCONF_BUS_NUMBER * 4096 * 256; - resource->flags = IORESOURCE_MEM | IORESOURCE_RESERVE | - IORESOURCE_FIXED | IORESOURCE_STORED | IORESOURCE_ASSIGNED; + mmconf_resource(dev, 0xc0010058); } static void set_resource(device_t dev, struct resource *resource, u32 nodeid) diff --git a/src/northbridge/amd/agesa/family15rl/northbridge.c b/src/northbridge/amd/agesa/family15rl/northbridge.c index b5f76909ca..d4970ef9e7 100644 --- a/src/northbridge/amd/agesa/family15rl/northbridge.c +++ b/src/northbridge/amd/agesa/family15rl/northbridge.c @@ -326,11 +326,7 @@ static void read_resources(struct device *dev) * It is not honored by the coreboot resource allocator if it is in * the CPU_CLUSTER. */ - struct resource *resource = new_resource(dev, 0xc0010058); - resource->base = CONFIG_MMCONF_BASE_ADDRESS; - resource->size = CONFIG_MMCONF_BUS_NUMBER * 4096 * 256; - resource->flags = IORESOURCE_MEM | IORESOURCE_RESERVE | - IORESOURCE_FIXED | IORESOURCE_STORED | IORESOURCE_ASSIGNED; + mmconf_resource(dev, 0xc0010058); } static void set_resource(struct device *dev, struct resource *resource, u32 nodeid) diff --git a/src/northbridge/amd/agesa/family15tn/northbridge.c b/src/northbridge/amd/agesa/family15tn/northbridge.c index 2353126049..7d36b13d29 100644 --- a/src/northbridge/amd/agesa/family15tn/northbridge.c +++ b/src/northbridge/amd/agesa/family15tn/northbridge.c @@ -325,11 +325,7 @@ static void nb_read_resources(device_t dev) * It is not honored by the coreboot resource allocator if it is in * the CPU_CLUSTER. */ - struct resource *resource = new_resource(dev, 0xc0010058); - resource->base = CONFIG_MMCONF_BASE_ADDRESS; - resource->size = CONFIG_MMCONF_BUS_NUMBER * 4096 * 256; - resource->flags = IORESOURCE_MEM | IORESOURCE_RESERVE | - IORESOURCE_FIXED | IORESOURCE_STORED | IORESOURCE_ASSIGNED; + mmconf_resource(dev, 0xc0010058); } static void set_resource(device_t dev, struct resource *resource, u32 nodeid) diff --git a/src/northbridge/amd/agesa/family16kb/northbridge.c b/src/northbridge/amd/agesa/family16kb/northbridge.c index 63e1c2e556..641487f1c7 100644 --- a/src/northbridge/amd/agesa/family16kb/northbridge.c +++ b/src/northbridge/amd/agesa/family16kb/northbridge.c @@ -325,11 +325,7 @@ static void read_resources(device_t dev) * It is not honored by the coreboot resource allocator if it is in * the APIC_CLUSTER. */ - struct resource *resource = new_resource(dev, 0xc0010058); - resource->base = CONFIG_MMCONF_BASE_ADDRESS; - resource->size = CONFIG_MMCONF_BUS_NUMBER * 4096 * 256; - resource->flags = IORESOURCE_MEM | IORESOURCE_RESERVE | - IORESOURCE_FIXED | IORESOURCE_STORED | IORESOURCE_ASSIGNED; + mmconf_resource(dev, 0xc0010058); } static void set_resource(device_t dev, struct resource *resource, u32 nodeid) diff --git a/src/northbridge/amd/amdfam10/northbridge.c b/src/northbridge/amd/amdfam10/northbridge.c index cc2e6f923b..43480d2db1 100644 --- a/src/northbridge/amd/amdfam10/northbridge.c +++ b/src/northbridge/amd/amdfam10/northbridge.c @@ -741,14 +741,7 @@ static void amdfam10_domain_read_resources(device_t dev) pci_domain_read_resources(dev); /* We have MMCONF_SUPPORT, create the resource window. */ - struct resource *res = new_resource(dev, 0xc0010058); - res->base = CONFIG_MMCONF_BASE_ADDRESS; - res->size = CONFIG_MMCONF_BUS_NUMBER * 1024 * 1024; /* Each bus needs 1M */ - res->align = log2(res->size); - res->gran = log2(res->size); - res->limit = 0xffffffffffffffffULL; /* 64-bit location allowed */ - res->flags = IORESOURCE_MEM | IORESOURCE_RESERVE | - IORESOURCE_FIXED | IORESOURCE_STORED | IORESOURCE_ASSIGNED; + mmconf_resource(dev, 0xc0010058); /* Reserve lower DRAM region to force PCI MMIO region to correct location above 0xefffffff */ ram_resource(dev, 7, 0, rdmsr(TOP_MEM).lo >> 10); diff --git a/src/northbridge/amd/pi/00630F01/northbridge.c b/src/northbridge/amd/pi/00630F01/northbridge.c index 4872db0f68..f863c73f7c 100644 --- a/src/northbridge/amd/pi/00630F01/northbridge.c +++ b/src/northbridge/amd/pi/00630F01/northbridge.c @@ -309,15 +309,6 @@ static void amdfam15_link_read_bases(device_t dev, u32 nodeid, u32 link) } -static void enable_mmconf_resource(device_t dev) -{ - struct resource *resource = new_resource(dev, 0xc0010058); - resource->base = CONFIG_MMCONF_BASE_ADDRESS; - resource->size = CONFIG_MMCONF_BUS_NUMBER * 4096 * 256; - resource->flags = IORESOURCE_MEM | IORESOURCE_RESERVE | - IORESOURCE_FIXED | IORESOURCE_STORED | IORESOURCE_ASSIGNED; -} - static void read_resources(device_t dev) { u32 nodeid; @@ -335,7 +326,7 @@ static void read_resources(device_t dev) * It is not honored by the coreboot resource allocator if it is in * the CPU_CLUSTER. */ - enable_mmconf_resource(dev); + mmconf_resource(dev, 0xc0010058); } static void set_resource(device_t dev, struct resource *resource, u32 nodeid) diff --git a/src/northbridge/amd/pi/00660F01/northbridge.c b/src/northbridge/amd/pi/00660F01/northbridge.c index 4c1254c0fe..941c39aa31 100644 --- a/src/northbridge/amd/pi/00660F01/northbridge.c +++ b/src/northbridge/amd/pi/00660F01/northbridge.c @@ -304,15 +304,6 @@ static void amdfam15_link_read_bases(device_t dev, u32 nodeid, u32 link) } -static void enable_mmconf_resource(device_t dev) -{ - struct resource *resource = new_resource(dev, 0xc0010058); - resource->base = CONFIG_MMCONF_BASE_ADDRESS; - resource->size = CONFIG_MMCONF_BUS_NUMBER * 4096 * 256; - resource->flags = IORESOURCE_MEM | IORESOURCE_RESERVE | - IORESOURCE_FIXED | IORESOURCE_STORED | IORESOURCE_ASSIGNED; -} - static void read_resources(device_t dev) { u32 nodeid; @@ -330,7 +321,7 @@ static void read_resources(device_t dev) * It is not honored by the coreboot resource allocator if it is in * the CPU_CLUSTER. */ - enable_mmconf_resource(dev); + mmconf_resource(dev, 0xc0010058); } static void set_resource(device_t dev, struct resource *resource, u32 nodeid) diff --git a/src/northbridge/amd/pi/00670F00/northbridge.c b/src/northbridge/amd/pi/00670F00/northbridge.c index 9a39410f49..b258aedaf4 100644 --- a/src/northbridge/amd/pi/00670F00/northbridge.c +++ b/src/northbridge/amd/pi/00670F00/northbridge.c @@ -304,15 +304,6 @@ static void amdfam15_link_read_bases(device_t dev, u32 nodeid, u32 link) } -static void enable_mmconf_resource(device_t dev) -{ - struct resource *resource = new_resource(dev, 0xc0010058); - resource->base = CONFIG_MMCONF_BASE_ADDRESS; - resource->size = CONFIG_MMCONF_BUS_NUMBER * 4096 * 256; - resource->flags = IORESOURCE_MEM | IORESOURCE_RESERVE | - IORESOURCE_FIXED | IORESOURCE_STORED | IORESOURCE_ASSIGNED; -} - static void read_resources(device_t dev) { u32 nodeid; @@ -330,7 +321,7 @@ static void read_resources(device_t dev) * It is not honored by the coreboot resource allocator if it is in * the CPU_CLUSTER. */ - enable_mmconf_resource(dev); + mmconf_resource(dev, 0xc0010058); } static void set_resource(device_t dev, struct resource *resource, u32 nodeid) diff --git a/src/northbridge/amd/pi/00730F01/northbridge.c b/src/northbridge/amd/pi/00730F01/northbridge.c index 44f91e2328..dbb41815c7 100644 --- a/src/northbridge/amd/pi/00730F01/northbridge.c +++ b/src/northbridge/amd/pi/00730F01/northbridge.c @@ -312,15 +312,6 @@ static void amdfam16_link_read_bases(device_t dev, u32 nodeid, u32 link) } -static void enable_mmconf_resource(device_t dev) -{ - struct resource *resource = new_resource(dev, 0xc0010058); - resource->base = CONFIG_MMCONF_BASE_ADDRESS; - resource->size = CONFIG_MMCONF_BUS_NUMBER * 4096 * 256; - resource->flags = IORESOURCE_MEM | IORESOURCE_RESERVE | - IORESOURCE_FIXED | IORESOURCE_STORED | IORESOURCE_ASSIGNED; -} - static void read_resources(device_t dev) { u32 nodeid; @@ -338,7 +329,7 @@ static void read_resources(device_t dev) * It is not honored by the coreboot resource allocator if it is in * the CPU_CLUSTER. */ - enable_mmconf_resource(dev); + mmconf_resource(dev, 0xc0010058); } static void set_resource(device_t dev, struct resource *resource, u32 nodeid) |