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authorStefan Reinauer <stepan@openbios.org>2003-08-28 15:08:43 +0000
committerStefan Reinauer <stepan@openbios.org>2003-08-28 15:08:43 +0000
commitf4440e65a45aaa7d05ea55a8304630d7fd31ac44 (patch)
treef7066f190a6e559f510c60b3622ea27f7ae85410 /src/northbridge/amd
parentf5f10d10979688e0d2ac7a01a262c50bf3e08b76 (diff)
downloadcoreboot-f4440e65a45aaa7d05ea55a8304630d7fd31ac44.tar.xz
more motherboard specific cleanups
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1089 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Diffstat (limited to 'src/northbridge/amd')
-rw-r--r--src/northbridge/amd/amdk8/coherent_ht.c61
1 files changed, 2 insertions, 59 deletions
diff --git a/src/northbridge/amd/amdk8/coherent_ht.c b/src/northbridge/amd/amdk8/coherent_ht.c
index 8bf8d15dd9..baf3781bf5 100644
--- a/src/northbridge/amd/amdk8/coherent_ht.c
+++ b/src/northbridge/amd/amdk8/coherent_ht.c
@@ -436,42 +436,6 @@ static unsigned int cpuid(unsigned int op)
static void coherent_ht_finalize(unsigned cpus)
{
-//BY LYH
-#if 1
- static const unsigned int register_values[] = {
- PCI_ADDR(0, 0x18, 0, 0x84), 0x88ff9c05, 0x11000020,
- PCI_ADDR(0, 0x18, 0, 0xa4), 0x88ff9c05, 0x11000020,
- PCI_ADDR(0, 0x18, 0, 0xc4), 0x88ff9c05, 0x770000d0,
- PCI_ADDR(0, 0x19, 0, 0x84), 0x88ff9c05, 0x770000d0,
- PCI_ADDR(0, 0x19, 0, 0xa4), 0x88ff9c05, 0x11000020,
- PCI_ADDR(0, 0x19, 0, 0xc4), 0x88ff9c05, 0x770000d0,
-
-
- PCI_ADDR(0, 0x18, 0, 0x88), 0xfffff0ff, 0x00000400,
- PCI_ADDR(0, 0x18, 0, 0xa8), 0xfffff0ff, 0x00000500,
- PCI_ADDR(0, 0x18, 0, 0xc8), 0xfffff0ff, 0x00000000,
- PCI_ADDR(0, 0x19, 0, 0x88), 0xfffff0ff, 0x00000000,
- PCI_ADDR(0, 0x19, 0, 0xa8), 0xfffff0ff, 0x00000500,
- PCI_ADDR(0, 0x19, 0, 0xc8), 0xfffff0ff, 0x00000000,
-
- PCI_ADDR(0, 0x18, 0, 0x94), 0xff0000ff, 0x00ff0000,
- PCI_ADDR(0, 0x18, 0, 0xb4), 0xff0000ff, 0x00000000,
- PCI_ADDR(0, 0x18, 0, 0xd4), 0xff0000ff, 0x00000000,
- PCI_ADDR(0, 0x19, 0, 0x94), 0xff0000ff, 0x00000000,
- PCI_ADDR(0, 0x19, 0, 0xb4), 0xff0000ff, 0x00000000,
- PCI_ADDR(0, 0x19, 0, 0xd4), 0xff0000ff, 0x00000000,
-
- };
- int i;
- int max;
-
-
- device_t dev;
- unsigned where;
- unsigned long reg;
-#endif
-//BY LYH END
-
int node;
bool rev_a0;
@@ -503,29 +467,6 @@ static void coherent_ht_finalize(unsigned cpus)
pci_write_config32(NODE_HT(node),0xd4,0);
}
}
-//BY LYH
-#if 1
- print_debug("setting up coherent ht domain....\r\n");
- max = sizeof(register_values)/sizeof(register_values[0]);
- for(i = 0; i < max; i += 3) {
-#if 0
- print_debug_hex32(i);
- print_debug(": ");
- print_debug_hex32(register_values[i]);
- print_debug(" <-");
- print_debug_hex32(register_values[i+2]);
- print_debug("\r\n");
-#endif
- dev = register_values[i] & ~0xff;
- where = register_values[i] & 0xff;
- reg = pci_read_config32(dev, where);
- reg &= register_values[i+1];
- reg |= register_values[i+2];
- pci_write_config32(dev, where, reg);
- }
-#endif
-//BY LYH END
-
#if 1
print_debug("done\r\n");
#endif
@@ -546,5 +487,7 @@ static int setup_coherent_ht_domain(void)
#endif
coherent_ht_finalize(cpus);
+ /* this should probably go away again. */
+ coherent_ht_mainboard(cpus);
return reset_needed;
}