diff options
author | Elyes HAOUAS <ehaouas@noos.fr> | 2019-03-29 17:45:28 +0100 |
---|---|---|
committer | Patrick Georgi <pgeorgi@google.com> | 2019-04-23 10:00:39 +0000 |
commit | 20eaef024cb06677de10d018e6f70c28d1841290 (patch) | |
tree | 9e3c264553fa807dd1347b5427f863e4b241949e /src/northbridge/amd | |
parent | 7118701e96c46e641cb4527e34fa48b77d105c43 (diff) | |
download | coreboot-20eaef024cb06677de10d018e6f70c28d1841290.tar.xz |
src: Add missing include 'console.h'
Change-Id: Ie21c390ab04adb5b05d5f9760d227d2a175ccb56
Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/32122
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Werner Zeh <werner.zeh@siemens.com>
Diffstat (limited to 'src/northbridge/amd')
-rw-r--r-- | src/northbridge/amd/agesa/family14/state_machine.c | 3 | ||||
-rw-r--r-- | src/northbridge/amd/amdmct/mct/mct_d.c | 2 | ||||
-rw-r--r-- | src/northbridge/amd/amdmct/mct/mctdqs_d.c | 2 | ||||
-rw-r--r-- | src/northbridge/amd/amdmct/mct/mcttmrl.c | 2 | ||||
-rw-r--r-- | src/northbridge/amd/pi/agesawrapper.c | 1 |
5 files changed, 8 insertions, 2 deletions
diff --git a/src/northbridge/amd/agesa/family14/state_machine.c b/src/northbridge/amd/agesa/family14/state_machine.c index d29656cd22..df55efa749 100644 --- a/src/northbridge/amd/agesa/family14/state_machine.c +++ b/src/northbridge/amd/agesa/family14/state_machine.c @@ -15,17 +15,16 @@ #include <Porting.h> #include <AGESA.h> - #include <arch/io.h> #include <cbmem.h> #include <cf9_reset.h> +#include <console/console.h> #include <device/device.h> #include <device/pci_def.h> #include <device/pci_ops.h> #include <smp/node.h> #include <northbridge/amd/agesa/state_machine.h> #include <northbridge/amd/agesa/agesa_helper.h> - #include <sb_cimx.h> void platform_BeforeInitReset(struct sysinfo *cb, AMD_RESET_PARAMS *Reset) diff --git a/src/northbridge/amd/amdmct/mct/mct_d.c b/src/northbridge/amd/amdmct/mct/mct_d.c index d956315226..629bc0f554 100644 --- a/src/northbridge/amd/amdmct/mct/mct_d.c +++ b/src/northbridge/amd/amdmct/mct/mct_d.c @@ -34,8 +34,10 @@ */ #include <string.h> +#include <console/console.h> #include <cpu/amd/msr.h> #include <device/pci_ops.h> + #include "mct_d.h" static u8 ReconfigureDIMMspare_D(struct MCTStatStruc *pMCTstat, diff --git a/src/northbridge/amd/amdmct/mct/mctdqs_d.c b/src/northbridge/amd/amdmct/mct/mctdqs_d.c index 75fc8a427e..e2dd56fc1a 100644 --- a/src/northbridge/amd/amdmct/mct/mctdqs_d.c +++ b/src/northbridge/amd/amdmct/mct/mctdqs_d.c @@ -13,9 +13,11 @@ * GNU General Public License for more details. */ +#include <console/console.h> #include <cpu/x86/cr.h> #include <cpu/amd/msr.h> #include <cpu/amd/mtrr.h> + #include "mct_d.h" static void CalcEccDQSPos_D(struct MCTStatStruc *pMCTstat, diff --git a/src/northbridge/amd/amdmct/mct/mcttmrl.c b/src/northbridge/amd/amdmct/mct/mcttmrl.c index 192288a2c4..a78d42df85 100644 --- a/src/northbridge/amd/amdmct/mct/mcttmrl.c +++ b/src/northbridge/amd/amdmct/mct/mcttmrl.c @@ -13,8 +13,10 @@ * GNU General Public License for more details. */ +#include <console/console.h> #include <cpu/x86/cr.h> #include <cpu/amd/msr.h> + #include "mct_d.h" /* diff --git a/src/northbridge/amd/pi/agesawrapper.c b/src/northbridge/amd/pi/agesawrapper.c index cda5e01980..1563216ba1 100644 --- a/src/northbridge/amd/pi/agesawrapper.c +++ b/src/northbridge/amd/pi/agesawrapper.c @@ -17,6 +17,7 @@ #include <cbfs.h> #include <cbmem.h> #include <delay.h> +#include <console/console.h> #include <cpu/x86/mtrr.h> #include <FchPlatform.h> #include <heapManager.h> |