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authorKyösti Mälkki <kyosti.malkki@gmail.com>2016-12-01 22:08:18 +0200
committerKyösti Mälkki <kyosti.malkki@gmail.com>2016-12-07 12:59:28 +0100
commit6f66f414a0907f79abf492cd9eca839c0849c7f6 (patch)
tree3e74145128261014798af58111db31d616fd43dd /src/northbridge/amd
parent891b6c4d199418a08ba88e42d6c8945ce05205f1 (diff)
downloadcoreboot-6f66f414a0907f79abf492cd9eca839c0849c7f6.tar.xz
PCI ops: MMCONF_SUPPORT_DEFAULT is required
Doing PCI config operations via MMIO window by default is a requirement, if supported by the platform. This means chipset or CPU code must enable MMCONF operations early in bootblock already, or before platform-specific romstage entry. Platforms are allowed to have NO_MMCONF_SUPPORT only in the case it is actually not implemented in the silicon. Change-Id: Id4d9029dec2fe195f09373320de800fcdf88c15d Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com> Reviewed-on: https://review.coreboot.org/17693 Tested-by: build bot (Jenkins) Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Diffstat (limited to 'src/northbridge/amd')
-rw-r--r--src/northbridge/amd/amdfam10/northbridge.c25
-rw-r--r--src/northbridge/amd/pi/00630F01/northbridge.c3
-rw-r--r--src/northbridge/amd/pi/00660F01/northbridge.c3
-rw-r--r--src/northbridge/amd/pi/00670F00/northbridge.c3
-rw-r--r--src/northbridge/amd/pi/00730F01/northbridge.c3
5 files changed, 16 insertions, 21 deletions
diff --git a/src/northbridge/amd/amdfam10/northbridge.c b/src/northbridge/amd/amdfam10/northbridge.c
index 5634441eb8..cc2e6f923b 100644
--- a/src/northbridge/amd/amdfam10/northbridge.c
+++ b/src/northbridge/amd/amdfam10/northbridge.c
@@ -740,19 +740,18 @@ static void amdfam10_domain_read_resources(device_t dev)
pci_domain_read_resources(dev);
- if (IS_ENABLED(CONFIG_MMCONF_SUPPORT)) {
- struct resource *res = new_resource(dev, 0xc0010058);
- res->base = CONFIG_MMCONF_BASE_ADDRESS;
- res->size = CONFIG_MMCONF_BUS_NUMBER * 1024 * 1024; /* Each bus needs 1M */
- res->align = log2(res->size);
- res->gran = log2(res->size);
- res->limit = 0xffffffffffffffffULL; /* 64-bit location allowed */
- res->flags = IORESOURCE_MEM | IORESOURCE_RESERVE |
- IORESOURCE_FIXED | IORESOURCE_STORED | IORESOURCE_ASSIGNED;
-
- /* Reserve lower DRAM region to force PCI MMIO region to correct location above 0xefffffff */
- ram_resource(dev, 7, 0, rdmsr(TOP_MEM).lo >> 10);
- }
+ /* We have MMCONF_SUPPORT, create the resource window. */
+ struct resource *res = new_resource(dev, 0xc0010058);
+ res->base = CONFIG_MMCONF_BASE_ADDRESS;
+ res->size = CONFIG_MMCONF_BUS_NUMBER * 1024 * 1024; /* Each bus needs 1M */
+ res->align = log2(res->size);
+ res->gran = log2(res->size);
+ res->limit = 0xffffffffffffffffULL; /* 64-bit location allowed */
+ res->flags = IORESOURCE_MEM | IORESOURCE_RESERVE |
+ IORESOURCE_FIXED | IORESOURCE_STORED | IORESOURCE_ASSIGNED;
+
+ /* Reserve lower DRAM region to force PCI MMIO region to correct location above 0xefffffff */
+ ram_resource(dev, 7, 0, rdmsr(TOP_MEM).lo >> 10);
if (is_fam15h()) {
enable_cc6 = 0;
diff --git a/src/northbridge/amd/pi/00630F01/northbridge.c b/src/northbridge/amd/pi/00630F01/northbridge.c
index fb115ff7b2..4872db0f68 100644
--- a/src/northbridge/amd/pi/00630F01/northbridge.c
+++ b/src/northbridge/amd/pi/00630F01/northbridge.c
@@ -335,8 +335,7 @@ static void read_resources(device_t dev)
* It is not honored by the coreboot resource allocator if it is in
* the CPU_CLUSTER.
*/
- if (IS_ENABLED(CONFIG_MMCONF_SUPPORT))
- enable_mmconf_resource(dev);
+ enable_mmconf_resource(dev);
}
static void set_resource(device_t dev, struct resource *resource, u32 nodeid)
diff --git a/src/northbridge/amd/pi/00660F01/northbridge.c b/src/northbridge/amd/pi/00660F01/northbridge.c
index 115d760706..4c1254c0fe 100644
--- a/src/northbridge/amd/pi/00660F01/northbridge.c
+++ b/src/northbridge/amd/pi/00660F01/northbridge.c
@@ -330,8 +330,7 @@ static void read_resources(device_t dev)
* It is not honored by the coreboot resource allocator if it is in
* the CPU_CLUSTER.
*/
- if (IS_ENABLED(CONFIG_MMCONF_SUPPORT))
- enable_mmconf_resource(dev);
+ enable_mmconf_resource(dev);
}
static void set_resource(device_t dev, struct resource *resource, u32 nodeid)
diff --git a/src/northbridge/amd/pi/00670F00/northbridge.c b/src/northbridge/amd/pi/00670F00/northbridge.c
index ce0dde3e5c..9a39410f49 100644
--- a/src/northbridge/amd/pi/00670F00/northbridge.c
+++ b/src/northbridge/amd/pi/00670F00/northbridge.c
@@ -330,8 +330,7 @@ static void read_resources(device_t dev)
* It is not honored by the coreboot resource allocator if it is in
* the CPU_CLUSTER.
*/
- if (IS_ENABLED(CONFIG_MMCONF_SUPPORT))
- enable_mmconf_resource(dev);
+ enable_mmconf_resource(dev);
}
static void set_resource(device_t dev, struct resource *resource, u32 nodeid)
diff --git a/src/northbridge/amd/pi/00730F01/northbridge.c b/src/northbridge/amd/pi/00730F01/northbridge.c
index 5b837218ce..44f91e2328 100644
--- a/src/northbridge/amd/pi/00730F01/northbridge.c
+++ b/src/northbridge/amd/pi/00730F01/northbridge.c
@@ -338,8 +338,7 @@ static void read_resources(device_t dev)
* It is not honored by the coreboot resource allocator if it is in
* the CPU_CLUSTER.
*/
- if (IS_ENABLED(CONFIG_MMCONF_SUPPORT))
- enable_mmconf_resource(dev);
+ enable_mmconf_resource(dev);
}
static void set_resource(device_t dev, struct resource *resource, u32 nodeid)