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authorElyes HAOUAS <ehaouas@noos.fr>2016-09-02 19:22:00 +0200
committerMartin Roth <martinroth@google.com>2016-09-12 20:08:19 +0200
commit6e8b3c11105682e58ccb0574148654adecc532f7 (patch)
treebcd395a865e9d3f981e5ef9e99ff7b8bbfea3fe5 /src/northbridge/intel/e7501
parent6b72787d270077969869e9b17b88a63539f172b4 (diff)
downloadcoreboot-6e8b3c11105682e58ccb0574148654adecc532f7.tar.xz
src/northbridge: Improve code formatting
Change-Id: Iffa058d9eb1e96a4d1587dc3f8a1740907ffbb32 Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr> Reviewed-on: https://review.coreboot.org/16414 Tested-by: build bot (Jenkins) Reviewed-by: Martin Roth <martinroth@google.com>
Diffstat (limited to 'src/northbridge/intel/e7501')
-rw-r--r--src/northbridge/intel/e7501/debug.c89
-rw-r--r--src/northbridge/intel/e7501/northbridge.c40
2 files changed, 64 insertions, 65 deletions
diff --git a/src/northbridge/intel/e7501/debug.c b/src/northbridge/intel/e7501/debug.c
index af9a8bfae8..d48a0893fd 100644
--- a/src/northbridge/intel/e7501/debug.c
+++ b/src/northbridge/intel/e7501/debug.c
@@ -35,7 +35,7 @@ static void dump_pci_device(unsigned dev)
for (i = 0; i < 256; i++) {
unsigned char val;
if ((i & 0x0f) == 0)
- printk(BIOS_DEBUG, "\n%02x:",i);
+ printk(BIOS_DEBUG, "\n%02x:",i);
val = pci_read_config8(dev, i);
printk(BIOS_DEBUG, " %02x", val);
}
@@ -61,19 +61,19 @@ static inline void dump_pci_devices(void)
static inline void dump_pci_devices_on_bus(unsigned busn)
{
- device_t dev;
- for (dev = PCI_DEV(busn, 0, 0);
- dev <= PCI_DEV(busn, 0x1f, 0x7);
- dev += PCI_DEV(0,0,1)) {
- uint32_t id;
- id = pci_read_config32(dev, PCI_VENDOR_ID);
- if (((id & 0xffff) == 0x0000) || ((id & 0xffff) == 0xffff) ||
- (((id >> 16) & 0xffff) == 0xffff) ||
- (((id >> 16) & 0xffff) == 0x0000)) {
- continue;
- }
- dump_pci_device(dev);
- }
+ device_t dev;
+ for (dev = PCI_DEV(busn, 0, 0);
+ dev <= PCI_DEV(busn, 0x1f, 0x7);
+ dev += PCI_DEV(0,0,1)) {
+ uint32_t id;
+ id = pci_read_config32(dev, PCI_VENDOR_ID);
+ if (((id & 0xffff) == 0x0000) || ((id & 0xffff) == 0xffff) ||
+ (((id >> 16) & 0xffff) == 0xffff) ||
+ (((id >> 16) & 0xffff) == 0x0000)) {
+ continue;
+ }
+ dump_pci_device(dev);
+ }
}
static inline void dump_spd_registers(const struct mem_controller *ctrl)
@@ -103,18 +103,18 @@ static inline void dump_spd_registers(const struct mem_controller *ctrl)
device = ctrl->channel1[i];
if (device) {
int j;
- printk(BIOS_DEBUG, "dimm: %02x.1: %02x", i, device);
+ printk(BIOS_DEBUG, "dimm: %02x.1: %02x", i, device);
for (j = 0; j < 128; j++) {
int status;
unsigned char byte;
if ((j & 0xf) == 0)
- printk(BIOS_DEBUG, "\n%02x: ", j);
+ printk(BIOS_DEBUG, "\n%02x: ", j);
status = smbus_read_byte(device, j);
if (status < 0) {
break;
}
byte = status & 0xff;
- printk(BIOS_DEBUG, "%02x ", byte);
+ printk(BIOS_DEBUG, "%02x ", byte);
}
printk(BIOS_DEBUG, "\n");
}
@@ -123,54 +123,53 @@ static inline void dump_spd_registers(const struct mem_controller *ctrl)
static inline void dump_smbus_registers(void)
{
unsigned device;
- printk(BIOS_DEBUG, "\n");
- for (device = 1; device < 0x80; device++) {
- int j;
+ printk(BIOS_DEBUG, "\n");
+ for (device = 1; device < 0x80; device++) {
+ int j;
if ( smbus_read_byte(device, 0) < 0 ) continue;
printk(BIOS_DEBUG, "smbus: %02x", device);
- for (j = 0; j < 256; j++) {
- int status;
- unsigned char byte;
- status = smbus_read_byte(device, j);
- if (status < 0) {
+ for (j = 0; j < 256; j++) {
+ int status;
+ unsigned char byte;
+ status = smbus_read_byte(device, j);
+ if (status < 0) {
break;
- }
- if ((j & 0xf) == 0)
+ }
+ if ((j & 0xf) == 0)
printk(BIOS_DEBUG, "\n%02x: ",j);
- byte = status & 0xff;
- printk(BIOS_DEBUG, "%02x ", byte);
- }
- printk(BIOS_DEBUG, "\n");
+ byte = status & 0xff;
+ printk(BIOS_DEBUG, "%02x ", byte);
+ }
+ printk(BIOS_DEBUG, "\n");
}
}
static inline void dump_io_resources(unsigned port)
{
-
int i;
printk(BIOS_DEBUG, "%04x:\n", port);
- for (i=0;i<256;i++) {
- uint8_t val;
- if ((i & 0x0f) == 0)
+ for (i=0;i<256;i++) {
+ uint8_t val;
+ if ((i & 0x0f) == 0)
printk(BIOS_DEBUG, "%02x:", i);
- val = inb(port);
+ val = inb(port);
printk(BIOS_DEBUG, " %02x",val);
- if ((i & 0x0f) == 0x0f) {
- printk(BIOS_DEBUG, "\n");
- }
+ if ((i & 0x0f) == 0x0f) {
+ printk(BIOS_DEBUG, "\n");
+ }
port++;
- }
+ }
}
static inline void dump_mem(unsigned start, unsigned end)
{
- unsigned i;
+ unsigned i;
printk(BIOS_DEBUG, "dump_mem:");
- for (i=start;i<end;i++) {
+ for (i=start;i<end;i++) {
if ((i & 0xf)==0)
printk(BIOS_DEBUG, "\n%08x:", i);
printk(BIOS_DEBUG, " %02x", (unsigned char)*((unsigned char *)i));
- }
- printk(BIOS_DEBUG, "\n");
- }
+ }
+ printk(BIOS_DEBUG, "\n");
+}
#endif
diff --git a/src/northbridge/intel/e7501/northbridge.c b/src/northbridge/intel/e7501/northbridge.c
index 5296bdb00e..d4f77ae654 100644
--- a/src/northbridge/intel/e7501/northbridge.c
+++ b/src/northbridge/intel/e7501/northbridge.c
@@ -23,9 +23,9 @@ unsigned long acpi_fill_mcfg(unsigned long current)
static void pci_domain_set_resources(device_t dev)
{
device_t mc_dev;
- uint32_t pci_tolm;
+ uint32_t pci_tolm;
- pci_tolm = find_pci_tolm(dev->link_list);
+ pci_tolm = find_pci_tolm(dev->link_list);
mc_dev = dev->link_list->children;
if (mc_dev) {
/* Figure out which areas are/should be occupied by RAM.
@@ -102,36 +102,36 @@ static void pci_domain_set_resources(device_t dev)
}
static struct device_operations pci_domain_ops = {
- .read_resources = pci_domain_read_resources,
- .set_resources = pci_domain_set_resources,
- .enable_resources = NULL,
- .init = NULL,
- .scan_bus = pci_domain_scan_bus,
+ .read_resources = pci_domain_read_resources,
+ .set_resources = pci_domain_set_resources,
+ .enable_resources = NULL,
+ .init = NULL,
+ .scan_bus = pci_domain_scan_bus,
.ops_pci_bus = pci_bus_default_ops,
};
static void cpu_bus_init(device_t dev)
{
- initialize_cpus(dev->link_list);
+ initialize_cpus(dev->link_list);
}
static struct device_operations cpu_bus_ops = {
- .read_resources = DEVICE_NOOP,
- .set_resources = DEVICE_NOOP,
- .enable_resources = DEVICE_NOOP,
- .init = cpu_bus_init,
- .scan_bus = 0,
+ .read_resources = DEVICE_NOOP,
+ .set_resources = DEVICE_NOOP,
+ .enable_resources = DEVICE_NOOP,
+ .init = cpu_bus_init,
+ .scan_bus = 0,
};
static void enable_dev(struct device *dev)
{
- /* Set the operations if it is a special bus type */
- if (dev->path.type == DEVICE_PATH_DOMAIN) {
- dev->ops = &pci_domain_ops;
- }
- else if (dev->path.type == DEVICE_PATH_CPU_CLUSTER) {
- dev->ops = &cpu_bus_ops;
- }
+ /* Set the operations if it is a special bus type */
+ if (dev->path.type == DEVICE_PATH_DOMAIN) {
+ dev->ops = &pci_domain_ops;
+ }
+ else if (dev->path.type == DEVICE_PATH_CPU_CLUSTER) {
+ dev->ops = &cpu_bus_ops;
+ }
}
struct chip_operations northbridge_intel_e7501_ops = {