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authorMartin Roth <martin@coreboot.org>2019-10-23 21:44:42 -0600
committerMartin Roth <martinroth@google.com>2019-10-27 18:12:50 +0000
commit468d02cc82151366a2781c9af29e6737105495cb (patch)
treede8540c053517a4da8b00ea95f24579bd9223dcd /src/northbridge/intel/e7505
parent36fcc85be459ec175c7f4be08db7ae9708f01b5d (diff)
downloadcoreboot-468d02cc82151366a2781c9af29e6737105495cb.tar.xz
src/[northbridge,security]: change "unsigned" to "unsigned int"
Signed-off-by: Martin Roth <martin@coreboot.org> Change-Id: If6b5930f78c3da6dcefaa7b6202cd0424a24525b Reviewed-on: https://review.coreboot.org/c/coreboot/+/36331 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Diffstat (limited to 'src/northbridge/intel/e7505')
-rw-r--r--src/northbridge/intel/e7505/raminit.c4
1 files changed, 2 insertions, 2 deletions
diff --git a/src/northbridge/intel/e7505/raminit.c b/src/northbridge/intel/e7505/raminit.c
index 8a336e6f0a..ba07b3e69b 100644
--- a/src/northbridge/intel/e7505/raminit.c
+++ b/src/northbridge/intel/e7505/raminit.c
@@ -434,7 +434,7 @@ static struct dimm_size sdram_spd_get_width(uint16_t dimm_socket_address)
* @param dimm_socket_address SMBus address of DIMM socket to interrogate.
* @return log2(number of bits) for each side of the DIMM.
*/
-static struct dimm_size spd_get_dimm_size(unsigned dimm_socket_address)
+static struct dimm_size spd_get_dimm_size(unsigned int dimm_socket_address)
{
int value;
@@ -757,7 +757,7 @@ DIMM-independent configuration functions:
* (0..MAX_DIMM_SOCKETS_PER_CHANNEL).
* @return New multiple of 64 MB total DRAM in the system.
*/
-static uint8_t configure_dimm_row_boundaries(struct dimm_size dimm_log2_num_bits, uint8_t total_dram_64M_multiple, unsigned dimm_index)
+static uint8_t configure_dimm_row_boundaries(struct dimm_size dimm_log2_num_bits, uint8_t total_dram_64M_multiple, unsigned int dimm_index)
{
int i;