diff options
| author | Elyes HAOUAS <ehaouas@noos.fr> | 2016-08-23 21:29:48 +0200 |
|---|---|---|
| committer | Martin Roth <martinroth@google.com> | 2016-08-31 20:30:03 +0200 |
| commit | 12df9505835393239d9e9589cff39a1d1dfddac1 (patch) | |
| tree | ffc470b0ff74d818cd6f0dc5cd750fd414c8d960 /src/northbridge/intel/e7505 | |
| parent | 5a7e72f1aef02b326a67d883d92fe8c0aad9f3a9 (diff) | |
| download | coreboot-12df9505835393239d9e9589cff39a1d1dfddac1.tar.xz | |
northbridge/intel: Add required space before opening parenthesis '('
Change-Id: I53208ce5db06d2c65f954e6d59222924ab87722e
Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr>
Reviewed-on: https://review.coreboot.org/16304
Tested-by: build bot (Jenkins)
Reviewed-by: Martin Roth <martinroth@google.com>
Diffstat (limited to 'src/northbridge/intel/e7505')
| -rw-r--r-- | src/northbridge/intel/e7505/debug.c | 26 | ||||
| -rw-r--r-- | src/northbridge/intel/e7505/raminit.c | 2 |
2 files changed, 14 insertions, 14 deletions
diff --git a/src/northbridge/intel/e7505/debug.c b/src/northbridge/intel/e7505/debug.c index cdf6e7ed17..33f1ed18f8 100644 --- a/src/northbridge/intel/e7505/debug.c +++ b/src/northbridge/intel/e7505/debug.c @@ -22,7 +22,7 @@ void print_debug_pci_dev(unsigned dev) void print_pci_devices(void) { device_t dev; - for(dev = PCI_DEV(0, 0, 0); + for (dev = PCI_DEV(0, 0, 0); dev <= PCI_DEV(0xff, 0x1f, 0x7); dev += PCI_DEV(0,0,1)) { uint32_t id; @@ -42,7 +42,7 @@ void dump_pci_device(unsigned dev) int i; print_debug_pci_dev(dev); - for(i = 0; i < 256; i++) { + for (i = 0; i < 256; i++) { unsigned char val; if ((i & 0x0f) == 0) printk(BIOS_DEBUG, "\n%02x:",i); @@ -55,7 +55,7 @@ void dump_pci_device(unsigned dev) void dump_pci_devices(void) { device_t dev; - for(dev = PCI_DEV(0, 0, 0); + for (dev = PCI_DEV(0, 0, 0); dev <= PCI_DEV(0xff, 0x1f, 0x7); dev += PCI_DEV(0,0,1)) { uint32_t id; @@ -72,7 +72,7 @@ void dump_pci_devices(void) void dump_pci_devices_on_bus(unsigned busn) { device_t dev; - for(dev = PCI_DEV(busn, 0, 0); + for (dev = PCI_DEV(busn, 0, 0); dev <= PCI_DEV(busn, 0x1f, 0x7); dev += PCI_DEV(0,0,1)) { uint32_t id; @@ -90,13 +90,13 @@ void dump_spd_registers(const struct mem_controller *ctrl) { int i; printk(BIOS_DEBUG, "\n"); - for(i = 0; i < 4; i++) { + for (i = 0; i < 4; i++) { unsigned device; device = ctrl->channel0[i]; if (device) { int j; printk(BIOS_DEBUG, "dimm: %02x.0: %02x", i, device); - for(j = 0; j < 128; j++) { + for (j = 0; j < 128; j++) { int status; unsigned char byte; if ((j & 0xf) == 0) @@ -114,7 +114,7 @@ void dump_spd_registers(const struct mem_controller *ctrl) if (device) { int j; printk(BIOS_DEBUG, "dimm: %02x.1: %02x", i, device); - for(j = 0; j < 128; j++) { + for (j = 0; j < 128; j++) { int status; unsigned char byte; if ((j & 0xf) == 0) @@ -134,11 +134,11 @@ void dump_smbus_registers(void) { unsigned device; printk(BIOS_DEBUG, "\n"); - for(device = 1; device < 0x80; device++) { + for (device = 1; device < 0x80; device++) { int j; - if( spd_read_byte(device, 0) < 0 ) continue; + if ( spd_read_byte(device, 0) < 0 ) continue; printk(BIOS_DEBUG, "smbus: %02x", device); - for(j = 0; j < 256; j++) { + for (j = 0; j < 256; j++) { int status; unsigned char byte; status = spd_read_byte(device, j); @@ -159,7 +159,7 @@ void dump_io_resources(unsigned port) int i; printk(BIOS_DEBUG, "%04x:\n", port); - for(i=0;i<256;i++) { + for (i=0;i<256;i++) { uint8_t val; if ((i & 0x0f) == 0) printk(BIOS_DEBUG, "%02x:", i); @@ -176,8 +176,8 @@ void dump_mem(unsigned start, unsigned end) { unsigned i; printk(BIOS_DEBUG, "dump_mem:"); - for(i=start;i<end;i++) { - if((i & 0xf)==0) + for (i=start;i<end;i++) { + if ((i & 0xf)==0) printk(BIOS_DEBUG, "\n%08x:", i); printk(BIOS_DEBUG, " %02x", (unsigned char)*((unsigned char *)i)); } diff --git a/src/northbridge/intel/e7505/raminit.c b/src/northbridge/intel/e7505/raminit.c index 7734ca50d1..259fdd2a5f 100644 --- a/src/northbridge/intel/e7505/raminit.c +++ b/src/northbridge/intel/e7505/raminit.c @@ -1710,7 +1710,7 @@ static void sdram_enable(const struct mem_controller *ctrl) /* And for good luck 6 more CBRs */ RAM_DEBUG_MESSAGE("Ram Enable 8\n"); int i; - for(i=0; i<8; i++) + for (i=0; i<8; i++) do_ram_command(RAM_COMMAND_CBR, 0); /* 9 mode register set */ |