svn mv src/northbridge/intel/E7520 src/northbridge/intel/e7520

svn mv src/northbridge/intel/E7525 src/northbridge/intel/e7525

Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Stefan Reinauer <stepan@coresystems.de>




git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2478 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1

1 files changed, 62 insertions, 0 deletions

diff --git a/src/northbridge/intel/e7520/pciexp_porta.c b/src/northbridge/intel/e7520/pciexp_porta.c
new file mode 100644
index 0000000000..a86917217a
--- /dev/null
+++ b/src/northbridge/intel/e7520/pciexp_porta.c
@@ -0,0 +1,62 @@
+#include <console/console.h>
+#include <device/device.h>
+#include <device/pci.h>
+#include <device/pci_ids.h>
+#include <device/pci_ops.h>
+#include <device/pciexp.h>
+#include <arch/io.h>
+#include "chip.h"
+#include <part/hard_reset.h>
+                                                           
+typedef struct northbridge_intel_e7520_config config_t;
+
+static void pcie_init(struct device *dev)
+{
+        config_t *config;
+                                                                                
+        /* Get the chip configuration */
+        config = dev->chip_info;
+                                                                                
+        if(config->intrline) {
+                pci_write_config32(dev, 0x3c, config->intrline);
+        }
+
+}
+
+static unsigned int pcie_scan_bridge(struct device *dev, unsigned int max)
+{
+	uint16_t val;
+	uint16_t ctl;
+	int flag = 0;
+	do {
+		val = pci_read_config16(dev, 0x76);
+		printk_debug("pcie porta 0x76: %02x\n", val);
+		if((val & (1<<10) )&&(!flag)) { /* training error */
+			ctl = pci_read_config16(dev, 0x74);
+			pci_write_config16(dev, 0x74, (ctl | (1<<5)));
+			val = pci_read_config16(dev, 0x76);
+			printk_debug("pcie porta reset 0x76: %02x\n", val);
+			flag=1;
+			hard_reset();
+		}
+	} while	( val & (3<<10) );
+	return pciexp_scan_bridge(dev, max);
+}
+
+static struct device_operations pcie_ops  = {
+        .read_resources   = pci_bus_read_resources,
+        .set_resources    = pci_dev_set_resources,
+        .enable_resources = pci_bus_enable_resources,
+        .init             = pcie_init,
+        .scan_bus         = pcie_scan_bridge,
+	.reset_bus        = pci_bus_reset,
+        .ops_pci          = 0,
+};
+
+static struct pci_driver pci_driver __pci_driver = {
+        .ops    = &pcie_ops,
+        .vendor = PCI_VENDOR_ID_INTEL,
+        .device = PCI_DEVICE_ID_INTEL_PCIE_PA,
+};
+                                                                                
+