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authorMatt DeVillier <matt.devillier@gmail.com>2018-03-29 14:59:57 +0200
committerNico Huber <nico.h@gmx.de>2018-06-30 09:02:56 +0000
commit7866d497ad20095cfd53b336bf9774e28a683890 (patch)
treea3cf2c31aef5063da0496a140227b96904f8c35e /src/northbridge/intel/gm45/acpi.c
parenta6b3b4dd8f52cf488263253eeac040574432cee2 (diff)
downloadcoreboot-7866d497ad20095cfd53b336bf9774e28a683890.tar.xz
arch/x86/acpi: Add DMAR RMRR helper functions
Add DMAR RMRR table entry and helper functions, using the existing DRHD functions as a model. As the DRHD device scope (DS) functions aren't DRHD-specific, genericize them to be used with RMRR tables as well. Correct DRHD bar size to match table entry in creator function, as noted in comments from patchset below. Adapted from/supersedes https://review.coreboot.org/25445 Change-Id: I912b1d7244ca4dd911bb6629533d453b1b4a06be Signed-off-by: Matt DeVillier <matt.devillier@gmail.com> Reviewed-on: https://review.coreboot.org/27269 Reviewed-by: Youness Alaoui <snifikino@gmail.com> Reviewed-by: Nico Huber <nico.h@gmx.de> Reviewed-by: Jay Talbott <JayTalbott@sysproconsulting.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/northbridge/intel/gm45/acpi.c')
-rw-r--r--src/northbridge/intel/gm45/acpi.c14
1 files changed, 7 insertions, 7 deletions
diff --git a/src/northbridge/intel/gm45/acpi.c b/src/northbridge/intel/gm45/acpi.c
index 73b098f610..d208eed4ab 100644
--- a/src/northbridge/intel/gm45/acpi.c
+++ b/src/northbridge/intel/gm45/acpi.c
@@ -78,24 +78,24 @@ static unsigned long acpi_fill_dmar(unsigned long current)
unsigned long tmp = current;
current += acpi_create_dmar_drhd(current, 0, 0, IOMMU_BASE1);
- current += acpi_create_dmar_drhd_ds_pci(current, 0, 0x1b, 0);
+ current += acpi_create_dmar_ds_pci(current, 0, 0x1b, 0);
acpi_dmar_drhd_fixup(tmp, current);
if (stepping != STEPPING_B2) {
tmp = current;
current += acpi_create_dmar_drhd(current, 0, 0, IOMMU_BASE2);
- current += acpi_create_dmar_drhd_ds_pci(current, 0, 0x2, 0);
- current += acpi_create_dmar_drhd_ds_pci(current, 0, 0x2, 1);
+ current += acpi_create_dmar_ds_pci(current, 0, 0x2, 0);
+ current += acpi_create_dmar_ds_pci(current, 0, 0x2, 1);
acpi_dmar_drhd_fixup(tmp, current);
}
if (me_active) {
tmp = current;
current += acpi_create_dmar_drhd(current, 0, 0, IOMMU_BASE3);
- current += acpi_create_dmar_drhd_ds_pci(current, 0, 0x3, 0);
- current += acpi_create_dmar_drhd_ds_pci(current, 0, 0x3, 1);
- current += acpi_create_dmar_drhd_ds_pci(current, 0, 0x3, 2);
- current += acpi_create_dmar_drhd_ds_pci(current, 0, 0x3, 3);
+ current += acpi_create_dmar_ds_pci(current, 0, 0x3, 0);
+ current += acpi_create_dmar_ds_pci(current, 0, 0x3, 1);
+ current += acpi_create_dmar_ds_pci(current, 0, 0x3, 2);
+ current += acpi_create_dmar_ds_pci(current, 0, 0x3, 3);
acpi_dmar_drhd_fixup(tmp, current);
}