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author | Arthur Heymans <arthur@aheymans.xyz> | 2019-10-12 14:35:25 +0200 |
---|---|---|
committer | Patrick Georgi <pgeorgi@google.com> | 2019-10-28 11:59:17 +0000 |
commit | be9533aba957e9c43f77381f436906951c13c98b (patch) | |
tree | b4ad42a54424f29043ce91b7d5135e6de2cad6f1 /src/northbridge/intel/gm45/bootblock.c | |
parent | 942ad6a137027d6a7d8d082dee20bb64c81dc813 (diff) | |
download | coreboot-be9533aba957e9c43f77381f436906951c13c98b.tar.xz |
nb/intel/gm45: Add C_ENVIRONMENT_BOOTBLOCK support
The i82801ix_early_init is now called both in the bootblock and
romstage. The rationale behind setting this up twice is to ensure
bootblock-romstage compatibility in the future if for instance VBOOT
is used.
This moves the console init to the bootblock.
The romstage now runs uncached. Adding a prog_run hooks to set up an
MTRR to cache the romstage will be done in a followup patch.
The default size of 64KiB is not modified for the bootblock as trying
to fit both EHCI and SPI flash debugging needs a more space and 64KiB
is the next power of 2 size that fits it.
TESTED on Thinkpad X200.
Change-Id: I8f59736cb54377973215f35e35d2cbcd1d82c374
Signed-off-by: Arthur Heymans <arthur@aheymans.xyz>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/35992
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Nico Huber <nico.h@gmx.de>
Diffstat (limited to 'src/northbridge/intel/gm45/bootblock.c')
-rw-r--r-- | src/northbridge/intel/gm45/bootblock.c | 3 |
1 files changed, 2 insertions, 1 deletions
diff --git a/src/northbridge/intel/gm45/bootblock.c b/src/northbridge/intel/gm45/bootblock.c index c076c5506b..d3aeb030f1 100644 --- a/src/northbridge/intel/gm45/bootblock.c +++ b/src/northbridge/intel/gm45/bootblock.c @@ -11,13 +11,14 @@ * GNU General Public License for more details. */ +#include <cpu/intel/car/bootblock.h> #include <device/pci_ops.h> /* Just re-define these instead of including gm45.h. It blows up romcc. */ #define D0F0_PCIEXBAR_LO 0x60 #define D0F0_PCIEXBAR_HI 0x64 -static void bootblock_northbridge_init(void) +void bootblock_early_northbridge_init(void) { uint32_t reg; |