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| author | Vladimir Serbinenko <phcoder@gmail.com> | 2015-10-10 23:58:08 +0200 |
|---|---|---|
| committer | Vladimir Serbinenko <phcoder@gmail.com> | 2015-10-11 10:07:12 +0000 |
| commit | 551cff08d540ced6817cfe230750a311d573c209 (patch) | |
| tree | ed32fa211b291527ed275aa286faa2af49584f72 /src/northbridge/intel/gm45/gma.c | |
| parent | 68c70994e5c7c38c8fe3625477d3191d186b7e68 (diff) | |
| download | coreboot-551cff08d540ced6817cfe230750a311d573c209.tar.xz | |
Derive lvds_dual_channel from EDID timings.
Based on the info by Felix Held.
Change-Id: Iab84dd8a0e3c942da20a6e21db5510e4ad16cadd
Signed-off-by: Vladimir Serbinenko <phcoder@gmail.com>
Reviewed-on: http://review.coreboot.org/11857
Tested-by: build bot (Jenkins)
Reviewed-by: Felix Held <felix-coreboot@felixheld.de>
Diffstat (limited to 'src/northbridge/intel/gm45/gma.c')
| -rw-r--r-- | src/northbridge/intel/gm45/gma.c | 14 |
1 files changed, 7 insertions, 7 deletions
diff --git a/src/northbridge/intel/gm45/gma.c b/src/northbridge/intel/gm45/gma.c index 42b340a8b8..33eae84774 100644 --- a/src/northbridge/intel/gm45/gma.c +++ b/src/northbridge/intel/gm45/gma.c @@ -174,7 +174,7 @@ static void intel_gma_init(const struct northbridge_intel_gm45_config *info, hfront_porch = mode->hso; vfront_porch = mode->vso; - target_frequency = info->gfx.lvds_dual_channel ? mode->pixel_clock + target_frequency = mode->lvds_dual_channel ? mode->pixel_clock : (2 * mode->pixel_clock); #if IS_ENABLED(CONFIG_FRAMEBUFFER_KEEP_VESA_MODE) vga_sr_write(1, 1); @@ -259,7 +259,7 @@ static void intel_gma_init(const struct northbridge_intel_gm45_config *info, printk(BIOS_DEBUG, (info->gfx.use_spread_spectrum_clock ? "Spread spectrum clock\n" : "DREF clock\n")); printk(BIOS_DEBUG, - info->gfx.lvds_dual_channel ? "Dual channel\n" : "Single channel\n"); + mode->lvds_dual_channel ? "Dual channel\n" : "Single channel\n"); printk(BIOS_DEBUG, "Polarities %d, %d\n", hpolarity, vpolarity); printk(BIOS_DEBUG, "Data M1=%d, N1=%d\n", @@ -276,7 +276,7 @@ static void intel_gma_init(const struct northbridge_intel_gm45_config *info, write32(mmio + LVDS, (hpolarity << 20) | (vpolarity << 21) - | (info->gfx.lvds_dual_channel ? LVDS_CLOCK_B_POWERUP_ALL + | (mode->lvds_dual_channel ? LVDS_CLOCK_B_POWERUP_ALL | LVDS_CLOCK_BOTH_POWERUP_ALL : 0) | LVDS_BORDER_ENABLE | LVDS_CLOCK_A_POWERUP_ALL); mdelay(1); @@ -287,7 +287,7 @@ static void intel_gma_init(const struct northbridge_intel_gm45_config *info, | ((pixel_m1 - 2) << 8) | pixel_m2); write32(mmio + DPLL(0), DPLL_VCO_ENABLE | DPLLB_MODE_LVDS - | (info->gfx.lvds_dual_channel ? DPLLB_LVDS_P2_CLOCK_DIV_7 + | (mode->lvds_dual_channel ? DPLLB_LVDS_P2_CLOCK_DIV_7 : DPLLB_LVDS_P2_CLOCK_DIV_14) | (0x10000 << (pixel_p1 - 1)) | ((info->gfx.use_spread_spectrum_clock ? 3 : 0) << 13) @@ -295,7 +295,7 @@ static void intel_gma_init(const struct northbridge_intel_gm45_config *info, mdelay(1); write32(mmio + DPLL(0), DPLL_VCO_ENABLE | DPLLB_MODE_LVDS - | (info->gfx.lvds_dual_channel ? DPLLB_LVDS_P2_CLOCK_DIV_7 + | (mode->lvds_dual_channel ? DPLLB_LVDS_P2_CLOCK_DIV_7 : DPLLB_LVDS_P2_CLOCK_DIV_14) | (0x10000 << (pixel_p1 - 1)) | ((info->gfx.use_spread_spectrum_clock ? 3 : 0) << 13) @@ -306,7 +306,7 @@ static void intel_gma_init(const struct northbridge_intel_gm45_config *info, write32(mmio + LVDS, (hpolarity << 20) | (vpolarity << 21) - | (info->gfx.lvds_dual_channel ? LVDS_CLOCK_B_POWERUP_ALL + | (mode->lvds_dual_channel ? LVDS_CLOCK_B_POWERUP_ALL | LVDS_CLOCK_BOTH_POWERUP_ALL : 0) | LVDS_BORDER_ENABLE | LVDS_CLOCK_A_POWERUP_ALL); @@ -397,7 +397,7 @@ static void intel_gma_init(const struct northbridge_intel_gm45_config *info, write32(mmio + LVDS, LVDS_PORT_ENABLE | (hpolarity << 20) | (vpolarity << 21) - | (info->gfx.lvds_dual_channel ? LVDS_CLOCK_B_POWERUP_ALL + | (mode->lvds_dual_channel ? LVDS_CLOCK_B_POWERUP_ALL | LVDS_CLOCK_BOTH_POWERUP_ALL : 0) | LVDS_BORDER_ENABLE | LVDS_CLOCK_A_POWERUP_ALL); |