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author | Angel Pons <th3fanbus@gmail.com> | 2020-08-03 13:55:18 +0200 |
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committer | Angel Pons <th3fanbus@gmail.com> | 2020-08-04 12:23:04 +0000 |
commit | c0c951630aa4cf3f0e01a551ffa64f57d0d7cd7f (patch) | |
tree | 225e7d18d6ee0c4f10d4698a8699f70ae10c7c81 /src/northbridge/intel/gm45/northbridge.c | |
parent | b9bbed2c41a64b60013080494d0125415fbcfdca (diff) | |
download | coreboot-c0c951630aa4cf3f0e01a551ffa64f57d0d7cd7f.tar.xz |
nb/intel/gm45: Deduplicate PCIEXBAR decoding
We can use `decode_pcie_bar` instead, if we make it non-static.
Change-Id: I4d005290355e30e6fdaae3e8e092891fddfbe4fc
Signed-off-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/44118
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Arthur Heymans <arthur@aheymans.xyz>
Diffstat (limited to 'src/northbridge/intel/gm45/northbridge.c')
-rw-r--r-- | src/northbridge/intel/gm45/northbridge.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/src/northbridge/intel/gm45/northbridge.c b/src/northbridge/intel/gm45/northbridge.c index e58ed0d967..8c27d50eb6 100644 --- a/src/northbridge/intel/gm45/northbridge.c +++ b/src/northbridge/intel/gm45/northbridge.c @@ -21,7 +21,7 @@ static const int legacy_hole_base_k = 0xa0000 / 1024; static const int legacy_hole_size_k = 128; -static int decode_pcie_bar(u32 *const base, u32 *const len) +int decode_pcie_bar(u32 *const base, u32 *const len) { *base = 0; *len = 0; |