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authorAngel Pons <th3fanbus@gmail.com>2020-09-16 13:11:52 +0200
committerPatrick Georgi <pgeorgi@google.com>2020-09-29 06:00:49 +0000
commitc88a4794c8d7336495785ab2d55e219caf5173a9 (patch)
tree225236818181e60f644acc311f9b1b176bc16667 /src/northbridge/intel/gm45
parent2f7d4c362ce75803f3df55e401e8831275f18c41 (diff)
downloadcoreboot-c88a4794c8d7336495785ab2d55e219caf5173a9.tar.xz
nb/intel/gm45: Answer question about conversion stepping A1
The datasheet briefly mentions what this mysterious stepping is about. Change-Id: I5bc1040b74fcdf3822b15e7564f8e4ccebd7d45f Signed-off-by: Angel Pons <th3fanbus@gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/45449 Reviewed-by: Nico Huber <nico.h@gmx.de> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/northbridge/intel/gm45')
-rw-r--r--src/northbridge/intel/gm45/gm45.h2
1 files changed, 1 insertions, 1 deletions
diff --git a/src/northbridge/intel/gm45/gm45.h b/src/northbridge/intel/gm45/gm45.h
index 23ec0914b9..95457fb4b7 100644
--- a/src/northbridge/intel/gm45/gm45.h
+++ b/src/northbridge/intel/gm45/gm45.h
@@ -16,7 +16,7 @@ typedef enum {
} fsb_clock_t;
typedef enum { /* Steppings below B1 were pre-production,
- conversion stepping A1 is... ?
+ conversion stepping A1 is a newer GL40 with support for 800 MT/s on FSB/DDR.
We'll support B1, B2, B3, and conversion stepping A1. */
STEPPING_A0 = 0,
STEPPING_A1 = 1,