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authorKyösti Mälkki <kyosti.malkki@gmail.com>2019-03-02 18:00:29 +0200
committerKyösti Mälkki <kyosti.malkki@gmail.com>2019-03-04 15:08:03 +0000
commit065857ee7fd61b05025d7a803e82f2b9b53cbc9a (patch)
tree3016bedfeac37b6aca649f1474f6343228ae9673 /src/northbridge/intel/gm45
parentbdaec07a859c0c05e7fd5276a15b3933da574368 (diff)
downloadcoreboot-065857ee7fd61b05025d7a803e82f2b9b53cbc9a.tar.xz
arch/io.h: Drop unnecessary include
Change-Id: I91158452680586ac676ea11c8589062880a31f91 Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com> Reviewed-on: https://review.coreboot.org/c/31692 Reviewed-by: Patrick Georgi <pgeorgi@google.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/northbridge/intel/gm45')
-rw-r--r--src/northbridge/intel/gm45/bootblock.c1
-rw-r--r--src/northbridge/intel/gm45/early_init.c1
-rw-r--r--src/northbridge/intel/gm45/igd.c1
-rw-r--r--src/northbridge/intel/gm45/iommu.c1
-rw-r--r--src/northbridge/intel/gm45/northbridge.c1
-rw-r--r--src/northbridge/intel/gm45/pcie.c1
-rw-r--r--src/northbridge/intel/gm45/pm.c1
-rw-r--r--src/northbridge/intel/gm45/ram_calc.c1
-rw-r--r--src/northbridge/intel/gm45/stage_cache.c1
-rw-r--r--src/northbridge/intel/gm45/thermal.c1
10 files changed, 0 insertions, 10 deletions
diff --git a/src/northbridge/intel/gm45/bootblock.c b/src/northbridge/intel/gm45/bootblock.c
index 5b1c301cfd..c076c5506b 100644
--- a/src/northbridge/intel/gm45/bootblock.c
+++ b/src/northbridge/intel/gm45/bootblock.c
@@ -11,7 +11,6 @@
* GNU General Public License for more details.
*/
-#include <arch/io.h>
#include <device/pci_ops.h>
/* Just re-define these instead of including gm45.h. It blows up romcc. */
diff --git a/src/northbridge/intel/gm45/early_init.c b/src/northbridge/intel/gm45/early_init.c
index 723a43f6bf..539d62c408 100644
--- a/src/northbridge/intel/gm45/early_init.c
+++ b/src/northbridge/intel/gm45/early_init.c
@@ -14,7 +14,6 @@
*/
#include <stdint.h>
-#include <arch/io.h>
#include <device/pci_ops.h>
#include "gm45.h"
diff --git a/src/northbridge/intel/gm45/igd.c b/src/northbridge/intel/gm45/igd.c
index b0e2ba9916..b1ce1bef90 100644
--- a/src/northbridge/intel/gm45/igd.c
+++ b/src/northbridge/intel/gm45/igd.c
@@ -16,7 +16,6 @@
#include <stdint.h>
#include <stddef.h>
-#include <arch/io.h>
#include <device/pci_ops.h>
#include <device/pci_def.h>
#include <console/console.h>
diff --git a/src/northbridge/intel/gm45/iommu.c b/src/northbridge/intel/gm45/iommu.c
index 642c8776ef..93e631638e 100644
--- a/src/northbridge/intel/gm45/iommu.c
+++ b/src/northbridge/intel/gm45/iommu.c
@@ -17,7 +17,6 @@
#include <stdint.h>
#include <string.h>
-#include <arch/io.h>
#include <device/pci_ops.h>
#include <device/pci_def.h>
#include <arch/acpi.h>
diff --git a/src/northbridge/intel/gm45/northbridge.c b/src/northbridge/intel/gm45/northbridge.c
index fddb1fe339..eda5e92225 100644
--- a/src/northbridge/intel/gm45/northbridge.c
+++ b/src/northbridge/intel/gm45/northbridge.c
@@ -15,7 +15,6 @@
#include <cbmem.h>
#include <console/console.h>
-#include <arch/io.h>
#include <device/pci_ops.h>
#include <stdint.h>
#include <device/device.h>
diff --git a/src/northbridge/intel/gm45/pcie.c b/src/northbridge/intel/gm45/pcie.c
index 1a6e3de1da..c470b8147c 100644
--- a/src/northbridge/intel/gm45/pcie.c
+++ b/src/northbridge/intel/gm45/pcie.c
@@ -17,7 +17,6 @@
#include <stdint.h>
#include <stddef.h>
#include <string.h>
-#include <arch/io.h>
#include <device/pci_ops.h>
#include <device/pci_def.h>
#include <console/console.h>
diff --git a/src/northbridge/intel/gm45/pm.c b/src/northbridge/intel/gm45/pm.c
index 9390fc7b30..a447a23093 100644
--- a/src/northbridge/intel/gm45/pm.c
+++ b/src/northbridge/intel/gm45/pm.c
@@ -17,7 +17,6 @@
#include <stdint.h>
#include <stddef.h>
#include <string.h>
-#include <arch/io.h>
#include <device/pci_def.h>
#include <cpu/x86/msr.h>
#include <cpu/intel/speedstep.h>
diff --git a/src/northbridge/intel/gm45/ram_calc.c b/src/northbridge/intel/gm45/ram_calc.c
index c1ef30e684..c72055fb3a 100644
--- a/src/northbridge/intel/gm45/ram_calc.c
+++ b/src/northbridge/intel/gm45/ram_calc.c
@@ -19,7 +19,6 @@
#include <stdint.h>
#include <arch/cpu.h>
-#include <arch/io.h>
#include <device/pci_ops.h>
#include <device/pci_def.h>
#include <console/console.h>
diff --git a/src/northbridge/intel/gm45/stage_cache.c b/src/northbridge/intel/gm45/stage_cache.c
index ed3b9d4c4d..cbe4556bab 100644
--- a/src/northbridge/intel/gm45/stage_cache.c
+++ b/src/northbridge/intel/gm45/stage_cache.c
@@ -13,7 +13,6 @@
* GNU General Public License for more details.
*/
-#include <arch/io.h>
#include <cbmem.h>
#include <device/pci.h>
#include <stage_cache.h>
diff --git a/src/northbridge/intel/gm45/thermal.c b/src/northbridge/intel/gm45/thermal.c
index 2869a48fd1..3ed75b30af 100644
--- a/src/northbridge/intel/gm45/thermal.c
+++ b/src/northbridge/intel/gm45/thermal.c
@@ -17,7 +17,6 @@
#include <stdint.h>
#include <stddef.h>
#include <string.h>
-#include <arch/io.h>
#include <device/pci_def.h>
#include <spd.h>
#include "delay.h"