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| author | Angel Pons <th3fanbus@gmail.com> | 2020-07-22 17:49:28 +0200 |
|---|---|---|
| committer | Patrick Georgi <pgeorgi@google.com> | 2020-08-03 05:31:47 +0000 |
| commit | 10993c4ad40c92b2b2796856f9de2a5f602a2da9 (patch) | |
| tree | 6c1f108c00a6ebab16d574aa44581bbde6697acd /src/northbridge/intel/gm45 | |
| parent | 08143576466918413bfae2303abc4d0d16ae5b5c (diff) | |
| download | coreboot-10993c4ad40c92b2b2796856f9de2a5f602a2da9.tar.xz | |
nb/intel/ironlake: Add QPI Physical Layer device definition
Like the QPI Link device, there can be more of these devices on
multi-socket platforms. So, name it Physical Layer 0.
Tested with BUILD_TIMELESS=1, Packard Bell MS2290 remains identical.
Change-Id: Ia5f6e42a742bc69237de38f1833e56c8da7c4f7e
Signed-off-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/43737
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Arthur Heymans <arthur@aheymans.xyz>
Diffstat (limited to 'src/northbridge/intel/gm45')
0 files changed, 0 insertions, 0 deletions