diff options
author | Aaron Durbin <adurbin@chromium.org> | 2012-10-31 22:57:16 -0500 |
---|---|---|
committer | Ronald G. Minnich <rminnich@gmail.com> | 2013-03-14 01:45:50 +0100 |
commit | 6d04f0f89e4bf8ea4bea35dd850dad7469ca5ab3 (patch) | |
tree | f2ef87afe46d78ad5a8eff161e6f29016ddf5918 /src/northbridge/intel/haswell/Kconfig | |
parent | 76c3700f02f79b49fec30d6ef18d336f122cbf50 (diff) | |
download | coreboot-6d04f0f89e4bf8ea4bea35dd850dad7469ca5ab3.tar.xz |
haswell: always use MMIO PCI config accesses
Add a bootblock.c file for the northbridge and setup the
PCIEXBAR as the first thing using IO PCI config acceses.
After that all PCI config accesses can use MMIO.
Change-Id: I51d229c626c45705dda1757c2f14265cbc0e6183
Signed-off-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-on: http://review.coreboot.org/2617
Tested-by: build bot (Jenkins)
Reviewed-by: Ronald G. Minnich <rminnich@gmail.com>
Diffstat (limited to 'src/northbridge/intel/haswell/Kconfig')
-rw-r--r-- | src/northbridge/intel/haswell/Kconfig | 5 |
1 files changed, 5 insertions, 0 deletions
diff --git a/src/northbridge/intel/haswell/Kconfig b/src/northbridge/intel/haswell/Kconfig index 7e27cfd118..a7f1f9be57 100644 --- a/src/northbridge/intel/haswell/Kconfig +++ b/src/northbridge/intel/haswell/Kconfig @@ -22,9 +22,14 @@ config NORTHBRIDGE_INTEL_HASWELL select CACHE_MRC_BIN select CPU_INTEL_HASWELL select REQUIRES_BLOB + select MMCONF_SUPPORT_DEFAULT if NORTHBRIDGE_INTEL_HASWELL +config BOOTBLOCK_NORTHBRIDGE_INIT + string + default "northbridge/intel/haswell/bootblock.c" + config VGA_BIOS_ID string default "8086,0166" |